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Merge branch 'bugfix/gpio_rom_patch_fix_v5.0' into 'release/v5.0'

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fix(gpio): fix esp_rom_gpio_connect_out_signal for gpio num over 31 on esp32/s2 (v5.0)

See merge request espressif/esp-idf!36869
This commit is contained in:
morris 2025-02-18 10:24:53 +08:00
commit 085bf84090
2 changed files with 3 additions and 3 deletions
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2
components/bootloader_support/src/esp32/bootloader_esp32.c
View File

@ -129,7 +129,7 @@ static esp_err_t bootloader_check_rated_cpu_clock(void)
{
int rated_freq = bootloader_clock_get_rated_freq_mhz();
if (rated_freq < CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) {
ESP_LOGE(TAG, "Chip CPU frequency rated for %dMHz, configured for %dMHz. Modify CPU frequency in menuconfig",
ESP_LOGE(TAG, "Chip CPU freq rated for %dMHz, configured for %dMHz. Modify CPU freq in menuconfig",
rated_freq, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ);
return ESP_FAIL;
}

4
components/esp_rom/patches/esp_rom_gpio.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -23,6 +23,6 @@ IRAM_ATTR void esp_rom_gpio_connect_out_signal(uint32_t gpio_num, uint32_t signa
}
REG_WRITE(GPIO_FUNC0_OUT_SEL_CFG_REG + (gpio_num * 4), value);
REG_WRITE(GPIO_ENABLE_W1TS_REG, (1 << gpio_num));
REG_WRITE((gpio_num < 32) ? GPIO_ENABLE_W1TS_REG : GPIO_ENABLE1_W1TS_REG, 1 << (gpio_num & 31));
}
#endif