fix(esp32h2): H2 ble timer clk enable issue

(cherry picked from commit ac8204c4ba6dac7118589cba0f6957e49a726a07)

Co-authored-by: Geng Yuchao <gengyuchao@espressif.com>
This commit is contained in:
Geng Yu Chao 2025-01-22 12:13:38 +08:00 committed by Geng Yuchao
parent b26d933e08
commit 095d82eb9b

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -60,15 +60,10 @@ static inline void modem_syscon_ll_enable_modem_sec_clock(modem_syscon_dev_t *hw
hw->clk_conf.clk_modem_sec_apb_en = en;
}
__attribute__((always_inline))
static inline void modem_syscon_ll_enable_ble_timer_apb(modem_syscon_dev_t *hw, bool en)
{
hw->clk_conf.clk_ble_timer_apb_en = en;
}
__attribute__((always_inline))
static inline void modem_syscon_ll_enable_ble_timer_clock(modem_syscon_dev_t *hw, bool en)
{
hw->clk_conf.clk_ble_timer_apb_en = en;
hw->clk_conf.clk_ble_timer_en = en;
}