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ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2

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This commit fixes an issue where in the ULP RISC-V I2C example causes
a spurious wakeup of the main CPU because of a Trap signal when the ULP
core does not meet the wakeup threshold values. This was due to the fact
that the RTC_CNTL_COCPU_DONE signal was being set before the
RTC_CNTL_COCPU_SHUT_RESET_EN signal which was causing the the ULP RISC-V
core to not reset properly on each cycle.

Closes https://github.com/espressif/esp-idf/issues/10301
This commit is contained in:
Sudeep Mohanty 2022-12-06 12:50:40 +05:30 committed by BOT
parent ae639f68a6
commit 099f648686
5 changed files with 10 additions and 17 deletions
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7
components/ulp/ulp_riscv/ulp_core/ulp_riscv_utils.c
View File

@ -26,11 +26,8 @@ void ulp_riscv_halt(void)
/* Setting the delay time after RISCV recv `DONE` signal, Ensure that action `RESET` can be executed in time. */
REG_SET_FIELD(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SHUT_2_CLK_DIS, 0x3F);
/* suspends the ulp operation*/
SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_DONE);
/* Resets the processor */
SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SHUT_RESET_EN);
/* Suspends the ulp operation and reset the ULP core. Must be the final operation before going to halt. */
SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_DONE | RTC_CNTL_COCPU_SHUT_RESET_EN);
while(1);
}

4
components/ulp/ulp_riscv/ulp_riscv.c
View File

@ -53,8 +53,6 @@ esp_err_t ulp_riscv_config_and_run(ulp_riscv_cfg_t* cfg)
#if CONFIG_IDF_TARGET_ESP32S2
/* Reset COCPU when power on. */
SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SHUT_RESET_EN);
esp_rom_delay_us(20);
CLEAR_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SHUT_RESET_EN);
/* The coprocessor cpu trap signal doesnt have a stable reset value,
force ULP-RISC-V clock on to stop RTC_COCPU_TRAP_TRIG_EN from waking the CPU*/
@ -75,8 +73,6 @@ esp_err_t ulp_riscv_config_and_run(ulp_riscv_cfg_t* cfg)
#elif CONFIG_IDF_TARGET_ESP32S3
/* Reset COCPU when power on. */
SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SHUT_RESET_EN);
esp_rom_delay_us(20);
CLEAR_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SHUT_RESET_EN);
/* The coprocessor cpu trap signal doesnt have a stable reset value,
force ULP-RISC-V clock on to stop RTC_COCPU_TRAP_TRIG_EN from waking the CPU*/

6
examples/system/ulp_riscv/i2c/main/bmp180_defs.h
View File

@ -103,8 +103,8 @@ static int32_t bmp180_calculate_real_pressure(int32_t up_data, int32_t ut_data,
/************************************************
* Temperature and Pressure thresholds (uncompensated) to wake up Main CPU
* The threshold values have been selected for demp purposes and may not
* The threshold values have been selected for demo purposes and may not
* represent real world use case.
************************************************/
#define EXAMPLE_UT_THRESHOLD 20000
#define EXAMPLE_UP_THRESHOLD 40000
#define EXAMPLE_UT_THRESHOLD 25000
#define EXAMPLE_UP_THRESHOLD 50000

4
examples/system/ulp_riscv/i2c/main/ulp/main.c
View File

@ -71,7 +71,7 @@ static void bmp180_read_ut_data(int16_t *ut_data)
ulp_riscv_i2c_master_write_to_device(&cmd, 1);
/* Wait at least 4.5 milliseconds for the sensor to complete the reading */
ulp_riscv_delay_cycles(5 * ULP_RISCV_CYCLES_PER_US * 1000);
ulp_riscv_delay_cycles(5 * ULP_RISCV_CYCLES_PER_MS);
/* Read uncompensated temperature data */
bmp180_read16((uint16_t *)ut_data, BMP180_SENSOR_REG_ADDR_SENSOR_DATA_MSB, BMP180_SENSOR_REG_ADDR_SENSOR_DATA_LSB);
@ -111,7 +111,7 @@ static void bmp180_read_up_data(int32_t *up_data, oss_mode_t oss_mode)
ulp_riscv_i2c_master_write_to_device(&cmd, 1);
/* Wait for the required amount of time for the sensor to complete the reading */
ulp_riscv_delay_cycles(wait * ULP_RISCV_CYCLES_PER_US * 1000);
ulp_riscv_delay_cycles(wait * ULP_RISCV_CYCLES_PER_MS);
/* Read uncompensated temperature data */

6
examples/system/ulp_riscv/i2c/main/ulp_riscv_rtc_i2c_example_main.c
View File

@ -143,7 +143,7 @@ void app_main(void)
}
/* Add a delay for everything to the printed before heading in to light sleep */
/* Add a delay for everything to the printed before heading in to deep sleep */
vTaskDelay(100);
/* Go back to sleep, only the ULP RISC-V will run */
@ -342,9 +342,9 @@ static void init_ulp_program(void)
ESP_ERROR_CHECK(err);
/* The first argument is the period index, which is not used by the ULP-RISC-V timer
* The second argument is the period in microseconds, which gives a wakeup time period of: 20ms
* The second argument is the period in microseconds, which gives a wakeup time period of: 40ms
*/
ulp_set_wakeup_period(0, 20000);
ulp_set_wakeup_period(0, 40000);
/* Start the program */
err = ulp_riscv_run();