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feat(ieee802154): update ieee802154 sleep logic and support modem sleep

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This commit is contained in:
xiaqilin 2023-09-20 19:23:36 +08:00
parent 7a32d72409
commit 1d02b6c1c6
6 changed files with 40 additions and 44 deletions
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8
components/esp_phy/src/btbb_init.c
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@ -22,11 +22,11 @@ static uint8_t s_btbb_access_ref = 0;
#include "btbb_retention_reg.h" #include "btbb_retention_reg.h"
static const char* TAG = "btbb_init"; static const char* TAG = "btbb_init";
#if SOC_PM_RETENTION_HAS_CLOCK_BUG // #if SOC_PM_RETENTION_HAS_CLOCK_BUG
#define BTBB_LINK_OWNER ENTRY(3) // #define BTBB_LINK_OWNER ENTRY(3)
#else // #else
#define BTBB_LINK_OWNER ENTRY(0) | ENTRY(2) #define BTBB_LINK_OWNER ENTRY(0) | ENTRY(2)
#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG // #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG
static esp_err_t btbb_sleep_retention_init(void) static esp_err_t btbb_sleep_retention_init(void)
{ {

49
components/ieee802154/driver/esp_ieee802154_dev.c
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@ -30,6 +30,12 @@
#include "esp_pm.h" #include "esp_pm.h"
#include "esp_private/esp_clk.h" #include "esp_private/esp_clk.h"
#include "esp_private/sleep_retention.h" #include "esp_private/sleep_retention.h"
static bool g_sleep_rf = false;
// #if SOC_PM_RETENTION_HAS_CLOCK_BUG
// #define BTBB_LINK_OWNER ENTRY(3)
// #else
#define IEEE802154_LINK_OWNER ENTRY(0) | ENTRY(2)
// #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG
#endif #endif
#define CCA_DETECTION_TIME 8 #define CCA_DETECTION_TIME 8
@ -673,6 +679,8 @@ IEEE802154_STATIC void tx_init(const uint8_t *frame)
esp_err_t ieee802154_transmit(const uint8_t *frame, bool cca) esp_err_t ieee802154_transmit(const uint8_t *frame, bool cca)
{ {
ieee802154_wakeup();
ieee802154_enter_critical(); ieee802154_enter_critical();
tx_init(frame); tx_init(frame);
@ -700,6 +708,9 @@ esp_err_t ieee802154_transmit_at(const uint8_t *frame, bool cca, uint32_t time)
{ {
uint32_t tx_target_time; uint32_t tx_target_time;
uint32_t current_time; uint32_t current_time;
ieee802154_wakeup();
tx_init(frame); tx_init(frame);
IEEE802154_SET_TXRX_PTI(IEEE802154_SCENE_TX_AT); IEEE802154_SET_TXRX_PTI(IEEE802154_SCENE_TX_AT);
if (cca) { if (cca) {
@ -741,6 +752,7 @@ esp_err_t ieee802154_receive(void)
// already in rx state, don't abort current rx operation // already in rx state, don't abort current rx operation
return ESP_OK; return ESP_OK;
} }
ieee802154_wakeup();
ieee802154_enter_critical(); ieee802154_enter_critical();
rx_init(); rx_init();
@ -753,7 +765,7 @@ esp_err_t ieee802154_receive_at(uint32_t time)
{ {
uint32_t rx_target_time = time - IEEE802154_RX_RAMPUP_TIME_US; uint32_t rx_target_time = time - IEEE802154_RX_RAMPUP_TIME_US;
uint32_t current_time; uint32_t current_time;
ieee802154_wakeup();
rx_init(); rx_init();
IEEE802154_SET_TXRX_PTI(IEEE802154_SCENE_RX_AT); IEEE802154_SET_TXRX_PTI(IEEE802154_SCENE_RX_AT);
set_next_rx_buffer(); set_next_rx_buffer();
@ -773,7 +785,7 @@ static esp_err_t ieee802154_sleep_init(void)
#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE #if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
#define N_REGS_IEEE802154() (((IEEE802154_MAC_DATE_REG - IEEE802154_REG_BASE) / 4) + 1) #define N_REGS_IEEE802154() (((IEEE802154_MAC_DATE_REG - IEEE802154_REG_BASE) / 4) + 1)
const static sleep_retention_entries_config_t ieee802154_mac_regs_retention[] = { const static sleep_retention_entries_config_t ieee802154_mac_regs_retention[] = {
[0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_IEEE802154_LINK(0x00), IEEE802154_REG_BASE, IEEE802154_REG_BASE, N_REGS_IEEE802154(), 0, 0), .owner = ENTRY(3) }, [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_IEEE802154_LINK(0x00), IEEE802154_REG_BASE, IEEE802154_REG_BASE, N_REGS_IEEE802154(), 0, 0), .owner = IEEE802154_LINK_OWNER },
}; };
err = sleep_retention_entries_create(ieee802154_mac_regs_retention, ARRAY_SIZE(ieee802154_mac_regs_retention), REGDMA_LINK_PRI_7, SLEEP_RETENTION_MODULE_802154_MAC); err = sleep_retention_entries_create(ieee802154_mac_regs_retention, ARRAY_SIZE(ieee802154_mac_regs_retention), REGDMA_LINK_PRI_7, SLEEP_RETENTION_MODULE_802154_MAC);
ESP_RETURN_ON_ERROR(err, IEEE802154_TAG, "failed to allocate memory for ieee802154 mac retention"); ESP_RETURN_ON_ERROR(err, IEEE802154_TAG, "failed to allocate memory for ieee802154 mac retention");
@ -785,38 +797,41 @@ static esp_err_t ieee802154_sleep_init(void)
IRAM_ATTR void ieee802154_enter_sleep(void) IRAM_ATTR void ieee802154_enter_sleep(void)
{ {
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
esp_phy_disable(); if (g_sleep_rf == false) {
#if SOC_PM_RETENTION_HAS_CLOCK_BUG esp_phy_disable();
sleep_retention_do_extra_retention(true);// backup g_sleep_rf = true;
#endif }
ieee802154_disable(); // IEEE802154 CLOCK Disable
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
} }
IRAM_ATTR void ieee802154_wakeup(void) IRAM_ATTR void ieee802154_wakeup(void)
{ {
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
ieee802154_enable(); // IEEE802154 CLOCK Enable if (g_sleep_rf) {
#if SOC_PM_RETENTION_HAS_CLOCK_BUG esp_phy_enable();
sleep_retention_do_extra_retention(false);// restore g_sleep_rf = false;
#endif }
esp_phy_enable();
#endif //CONFIG_FREERTOS_USE_TICKLESS_IDLE #endif //CONFIG_FREERTOS_USE_TICKLESS_IDLE
} }
esp_err_t ieee802154_sleep(void) esp_err_t ieee802154_sleep(void)
{ {
ieee802154_enter_critical(); if (ieee802154_get_state() != IEEE802154_STATE_SLEEP) {
ieee802154_enter_critical();
stop_current_operation();
ieee802154_set_state(IEEE802154_STATE_SLEEP);
stop_current_operation(); ieee802154_exit_critical();
ieee802154_set_state(IEEE802154_STATE_SLEEP);
ieee802154_exit_critical(); ieee802154_enter_sleep(); // colse rf
}
return ESP_OK; return ESP_OK;
} }
esp_err_t ieee802154_energy_detect(uint32_t duration) esp_err_t ieee802154_energy_detect(uint32_t duration)
{ {
ieee802154_wakeup();
ieee802154_enter_critical(); ieee802154_enter_critical();
stop_current_operation(); stop_current_operation();
@ -832,6 +847,8 @@ esp_err_t ieee802154_energy_detect(uint32_t duration)
esp_err_t ieee802154_cca(void) esp_err_t ieee802154_cca(void)
{ {
ieee802154_wakeup();
ieee802154_enter_critical(); ieee802154_enter_critical();
stop_current_operation(); stop_current_operation();

10
components/ieee802154/esp_ieee802154.c
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@ -334,16 +334,6 @@ uint8_t esp_ieee802154_get_recent_lqi(void)
return ieee802154_get_recent_lqi(); return ieee802154_get_recent_lqi();
} }
void esp_ieee802154_enter_sleep(void)
{
ieee802154_enter_sleep();
}
void esp_ieee802154_wakeup(void)
{
ieee802154_wakeup();
}
__attribute__((weak)) void esp_ieee802154_receive_done(uint8_t *data, esp_ieee802154_frame_info_t *frame_info) __attribute__((weak)) void esp_ieee802154_receive_done(uint8_t *data, esp_ieee802154_frame_info_t *frame_info)
{ {

10
components/ieee802154/include/esp_ieee802154.h
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@ -111,16 +111,6 @@ esp_ieee802154_state_t esp_ieee802154_get_state(void);
*/ */
esp_err_t esp_ieee802154_sleep(void); esp_err_t esp_ieee802154_sleep(void);
/**
* @brief The IEEE 802.15.4 enter sleep.
*/
void esp_ieee802154_enter_sleep(void);
/**
* @brief The IEEE 802.15.4 wakeup.
*/
void esp_ieee802154_wakeup(void);
/** /**
* @brief Set the IEEE 802.15.4 Radio to receive state. * @brief Set the IEEE 802.15.4 Radio to receive state.
* *

4
components/openthread/src/port/esp_openthread_sleep.c
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@ -34,8 +34,7 @@ esp_err_t esp_openthread_sleep_init(void)
void esp_openthread_sleep_process(void) void esp_openthread_sleep_process(void)
{ {
if (esp_ieee802154_get_state() == ESP_IEEE802154_RADIO_SLEEP) { if (s_ot_sleep == false && esp_ieee802154_get_state() == ESP_IEEE802154_RADIO_SLEEP) {
esp_ieee802154_enter_sleep();
esp_pm_lock_release(s_pm_lock); esp_pm_lock_release(s_pm_lock);
s_ot_sleep = true; s_ot_sleep = true;
} }
@ -45,7 +44,6 @@ void esp_openthread_wakeup_process(void)
{ {
if (s_ot_sleep) { if (s_ot_sleep) {
esp_pm_lock_acquire(s_pm_lock); esp_pm_lock_acquire(s_pm_lock);
esp_ieee802154_wakeup();
s_ot_sleep = false; s_ot_sleep = false;
} }
} }

3
examples/openthread/ot_sleepy_device/main/esp_ot_sleepy_device_config.h
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@ -25,6 +25,7 @@
} }
#endif #endif
// When JIRA PM-3 fix, uart clock can autoswitch.
#define ESP_OPENTHREAD_DEFAULT_HOST_CONFIG() \ #define ESP_OPENTHREAD_DEFAULT_HOST_CONFIG() \
{ \ { \
.host_connection_mode = HOST_CONNECTION_MODE_CLI_UART, \ .host_connection_mode = HOST_CONNECTION_MODE_CLI_UART, \
@ -38,7 +39,7 @@
.stop_bits = UART_STOP_BITS_1, \ .stop_bits = UART_STOP_BITS_1, \
.flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \ .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \
.rx_flow_ctrl_thresh = 0, \ .rx_flow_ctrl_thresh = 0, \
.source_clk = UART_SCLK_DEFAULT, \ .source_clk = UART_SCLK_XTAL, \
}, \ }, \
.rx_pin = UART_PIN_NO_CHANGE, \ .rx_pin = UART_PIN_NO_CHANGE, \
.tx_pin = UART_PIN_NO_CHANGE, \ .tx_pin = UART_PIN_NO_CHANGE, \