refactor(ecdsa): rely on efuse to get chip revision

This commit is contained in:
laokaiyao 2025-01-17 17:06:29 +08:00 committed by BOT
parent 2ff128ebf4
commit 202b74eca8
5 changed files with 20 additions and 42 deletions

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@ -42,10 +42,6 @@ ESP_SYSTEM_INIT_FN(esp_security_init, SECONDARY, BIT(0), 103)
esp_crypto_dpa_protection_startup();
#endif
#if SOC_ECDSA_REGISTER_INCOMPATIBILITY_ACROSS_REV
ecdsa_compatible_mem_reg_addr_init();
#endif
#if CONFIG_ESP_CRYPTO_FORCE_ECC_CONSTANT_TIME_POINT_MUL
bool force_constant_time = true;
#if CONFIG_IDF_TARGET_ESP32H2

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@ -27,10 +27,6 @@ if(target STREQUAL "esp32")
list(APPEND srcs "${target_folder}/dport_access.c")
endif()
if(target STREQUAL "esp32h2")
list(APPEND srcs "${target_folder}/ecdsa_reg_addr.c")
endif()
if(CONFIG_SOC_ADC_SUPPORTED)
list(APPEND srcs "${target_folder}/adc_periph.c")
endif()

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@ -1,28 +0,0 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
// This file initialises the memory register addresses for the ECDSA accelerator
// This software initialization is required due to incompatibility between the old and new ECDSA versions
// for the ESP32-H2 ECDSA accelerator
#include <stddef.h>
#include "soc/ecdsa_reg.h"
// Initializing the memory address with the base address of the old ECDSA version
uint32_t ECDSA_R_MEM = (DR_REG_ECDSA_BASE + 0xA00);
uint32_t ECDSA_S_MEM = (DR_REG_ECDSA_BASE + 0xA20);
uint32_t ECDSA_Z_MEM = (DR_REG_ECDSA_BASE + 0xA40);
uint32_t ECDSA_QAX_MEM = (DR_REG_ECDSA_BASE + 0xA60);
uint32_t ECDSA_QAY_MEM = (DR_REG_ECDSA_BASE + 0xA80);
void ecdsa_compatible_mem_reg_addr_init(void)
{
// set the memory registers based on the DATE register value
ECDSA_R_MEM = (DR_REG_ECDSA_BASE + ECDSA_REG_GET_OFFSET(0xA00, 0x340));
ECDSA_S_MEM = (DR_REG_ECDSA_BASE + ECDSA_REG_GET_OFFSET(0xA20, 0x360));
ECDSA_Z_MEM = (DR_REG_ECDSA_BASE + ECDSA_REG_GET_OFFSET(0xA40, 0x380));
ECDSA_QAX_MEM = (DR_REG_ECDSA_BASE + ECDSA_REG_GET_OFFSET(0xA60, 0x3A0));
ECDSA_QAY_MEM = (DR_REG_ECDSA_BASE + ECDSA_REG_GET_OFFSET(0xA80, 0x3C0));
}

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@ -0,0 +1,13 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "soc/efuse_struct.h"
#define ESP_SOC_GET_CHIP_REV (EFUSE.rd_mac_sys_3.wafer_version_major * 100 + EFUSE.rd_mac_sys_3.wafer_version_minor)
#define REG_COMPATIBLE_ADDR(rev, before_addr, after_addr) ((ESP_SOC_GET_CHIP_REV >= (rev)) ? (after_addr) : (before_addr))

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@ -7,6 +7,8 @@
#include <stdint.h>
#include "soc/soc.h"
#include "soc/chip_rev.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -448,34 +450,33 @@ extern "C" {
/** ECDSA_R_MEM register
* The memory that stores r.
*/
extern uint32_t ECDSA_R_MEM;
#define ECDSA_R_MEM (DR_REG_ECDSA_BASE + REG_COMPATIBLE_ADDR(102, 0xa00, 0x340))
#define ECDSA_R_MEM_SIZE_BYTES 32
/** ECDSA_S_MEM register
* The memory that stores s.
*/
extern uint32_t ECDSA_S_MEM;
#define ECDSA_S_MEM (DR_REG_ECDSA_BASE + REG_COMPATIBLE_ADDR(102, 0xa20, 0x360))
#define ECDSA_S_MEM_SIZE_BYTES 32
/** ECDSA_Z_MEM register
* The memory that stores software written z.
*/
extern uint32_t ECDSA_Z_MEM;
#define ECDSA_Z_MEM (DR_REG_ECDSA_BASE + REG_COMPATIBLE_ADDR(102, 0xa40, 0x380))
#define ECDSA_Z_MEM_SIZE_BYTES 32
/** ECDSA_QAX_MEM register
* The memory that stores x coordinates of QA or software written k.
*/
extern uint32_t ECDSA_QAX_MEM;
#define ECDSA_QAX_MEM (DR_REG_ECDSA_BASE + REG_COMPATIBLE_ADDR(102, 0xa60, 0x3a0))
#define ECDSA_QAX_MEM_SIZE_BYTES 32
/** ECDSA_QAY_MEM register
* The memory that stores y coordinates of QA.
*/
extern uint32_t ECDSA_QAY_MEM;
#define ECDSA_QAY_MEM (DR_REG_ECDSA_BASE + REG_COMPATIBLE_ADDR(102, 0xa80, 0x3c0))
#define ECDSA_QAY_MEM_SIZE_BYTES 32
#ifdef __cplusplus
}
#endif