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Merge branch 'feat/gpspi_flash_support_v5.3' into 'release/v5.3'

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fix(spi_flash): Add external flash support on esp32c6,esp32h2,esp32p4(backport v5.3)

See merge request espressif/esp-idf!32522
This commit is contained in:
morris 2024-08-05 17:13:53 +08:00
commit 21147cd7f5
8 changed files with 147 additions and 99 deletions
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16
components/hal/esp32c5/include/hal/gpspi_flash_ll.h
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@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -406,6 +406,20 @@ static inline void gpspi_flash_ll_set_dummy(spi_dev_t *dev, uint32_t dummy_n)
abort(); abort();
} }
/**
* Set D/Q output level during dummy phase
*
* @param dev Beginning address of the peripheral registers.
* @param out_en whether to enable IO output for dummy phase
* @param out_level dummy output level
*/
static inline void gpspi_flash_ll_set_dummy_out(spi_dev_t *dev, uint32_t out_en, uint32_t out_lev)
{
dev->ctrl.dummy_out = out_en;
dev->ctrl.q_pol = out_lev;
dev->ctrl.d_pol = out_lev;
}
/** /**
* Set extra hold time of CS after the clocks. * Set extra hold time of CS after the clocks.
* *

16
components/hal/esp32c6/include/hal/gpspi_flash_ll.h
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@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -366,6 +366,20 @@ static inline void gpspi_flash_ll_set_dummy(spi_dev_t *dev, uint32_t dummy_n)
HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user1, usr_dummy_cyclelen, dummy_n - 1); HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user1, usr_dummy_cyclelen, dummy_n - 1);
} }
/**
* Set D/Q output level during dummy phase
*
* @param dev Beginning address of the peripheral registers.
* @param out_en whether to enable IO output for dummy phase
* @param out_level dummy output level
*/
static inline void gpspi_flash_ll_set_dummy_out(spi_dev_t *dev, uint32_t out_en, uint32_t out_lev)
{
dev->ctrl.dummy_out = out_en;
dev->ctrl.q_pol = out_lev;
dev->ctrl.d_pol = out_lev;
}
/** /**
* Set extra hold time of CS after the clocks. * Set extra hold time of CS after the clocks.
* *

14
components/hal/esp32c61/include/hal/gpspi_flash_ll.h
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@ -368,6 +368,20 @@ static inline void gpspi_flash_ll_set_dummy(spi_dev_t *dev, uint32_t dummy_n)
HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user1, usr_dummy_cyclelen, dummy_n - 1); HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user1, usr_dummy_cyclelen, dummy_n - 1);
} }
/**
* Set D/Q output level during dummy phase
*
* @param dev Beginning address of the peripheral registers.
* @param out_en whether to enable IO output for dummy phase
* @param out_level dummy output level
*/
static inline void gpspi_flash_ll_set_dummy_out(spi_dev_t *dev, uint32_t out_en, uint32_t out_lev)
{
dev->ctrl.dummy_out = out_en;
dev->ctrl.q_pol = out_lev;
dev->ctrl.d_pol = out_lev;
}
/** /**
* Set extra hold time of CS after the clocks. * Set extra hold time of CS after the clocks.
* *

62
components/hal/esp32h2/include/hal/gpspi_flash_ll.h
View File

@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -53,9 +53,9 @@ static inline void gpspi_flash_ll_reset(spi_dev_t *dev)
dev->clk_gate.mst_clk_sel = 1; dev->clk_gate.mst_clk_sel = 1;
dev->dma_conf.val = 0; dev->dma_conf.val = 0;
// dev->dma_conf.tx_seg_trans_clr_en = 1; dev->dma_conf.slv_tx_seg_trans_clr_en = 1;
// dev->dma_conf.rx_seg_trans_clr_en = 1; dev->dma_conf.slv_rx_seg_trans_clr_en = 1;
// dev->dma_conf.dma_seg_trans_en = 0; dev->dma_conf.dma_slv_seg_trans_en = 0;
} }
/** /**
@ -79,20 +79,20 @@ static inline bool gpspi_flash_ll_cmd_is_done(const spi_dev_t *dev)
*/ */
static inline void gpspi_flash_ll_get_buffer_data(spi_dev_t *dev, void *buffer, uint32_t read_len) static inline void gpspi_flash_ll_get_buffer_data(spi_dev_t *dev, void *buffer, uint32_t read_len)
{ {
// if (((intptr_t)buffer % 4 == 0) && (read_len % 4 == 0)) { if (((intptr_t)buffer % 4 == 0) && (read_len % 4 == 0)) {
// // If everything is word-aligned, do a faster memcpy // If everything is word-aligned, do a faster memcpy
// memcpy(buffer, (void *)dev->data_buf, read_len); memcpy(buffer, (void *)dev->data_buf, read_len);
// } else { } else {
// // Otherwise, slow(er) path copies word by word // Otherwise, slow(er) path copies word by word
// int copy_len = read_len; int copy_len = read_len;
// for (int i = 0; i < (read_len + 3) / 4; i++) { for (int i = 0; i < (read_len + 3) / 4; i++) {
// int word_len = MIN(sizeof(uint32_t), copy_len); int word_len = MIN(sizeof(uint32_t), copy_len);
// uint32_t word = dev->data_buf[i]; uint32_t word = dev->data_buf[i].buf0;
// memcpy(buffer, &word, word_len); memcpy(buffer, &word, word_len);
// buffer = (void *)((intptr_t)buffer + word_len); buffer = (void *)((intptr_t)buffer + word_len);
// copy_len -= word_len; copy_len -= word_len;
// } }
// } }
} }
/** /**
@ -103,7 +103,7 @@ static inline void gpspi_flash_ll_get_buffer_data(spi_dev_t *dev, void *buffer,
*/ */
static inline void gpspi_flash_ll_write_word(spi_dev_t *dev, uint32_t word) static inline void gpspi_flash_ll_write_word(spi_dev_t *dev, uint32_t word)
{ {
// dev->data_buf[0] = word; dev->data_buf[0].buf0 = word;
} }
/** /**
@ -116,15 +116,15 @@ static inline void gpspi_flash_ll_write_word(spi_dev_t *dev, uint32_t word)
static inline void gpspi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *buffer, uint32_t length) static inline void gpspi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *buffer, uint32_t length)
{ {
// Load data registers, word at a time // Load data registers, word at a time
// int num_words = (length + 3) / 4; int num_words = (length + 3) / 4;
// for (int i = 0; i < num_words; i++) { for (int i = 0; i < num_words; i++) {
// uint32_t word = 0; uint32_t word = 0;
// uint32_t word_len = MIN(length, sizeof(word)); uint32_t word_len = MIN(length, sizeof(word));
// memcpy(&word, buffer, word_len); memcpy(&word, buffer, word_len);
// dev->data_buf[i] = word; dev->data_buf[i].buf0 = word;
// length -= word_len; length -= word_len;
// buffer = (void *)((intptr_t)buffer + word_len); buffer = (void *)((intptr_t)buffer + word_len);
// } }
} }
/** /**
@ -339,8 +339,8 @@ static inline void gpspi_flash_ll_set_addr_bitlen(spi_dev_t *dev, uint32_t bitle
static inline void gpspi_flash_ll_set_usr_address(spi_dev_t *dev, uint32_t addr, uint32_t bitlen) static inline void gpspi_flash_ll_set_usr_address(spi_dev_t *dev, uint32_t addr, uint32_t bitlen)
{ {
// The blank region should be all ones // The blank region should be all ones
// uint32_t padding_ones = (bitlen == 32? 0 : UINT32_MAX >> bitlen); uint32_t padding_ones = (bitlen == 32? 0 : UINT32_MAX >> bitlen);
// dev->addr = (addr << (32 - bitlen)) | padding_ones; dev->addr.val = (addr << (32 - bitlen)) | padding_ones;
} }
/** /**
@ -351,7 +351,7 @@ static inline void gpspi_flash_ll_set_usr_address(spi_dev_t *dev, uint32_t addr,
*/ */
static inline void gpspi_flash_ll_set_address(spi_dev_t *dev, uint32_t addr) static inline void gpspi_flash_ll_set_address(spi_dev_t *dev, uint32_t addr)
{ {
// dev->addr = addr; dev->addr.val = addr;
} }
/** /**

92
components/hal/esp32p4/include/hal/gpspi_flash_ll.h
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@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -23,7 +23,6 @@
#include <stdbool.h> #include <stdbool.h>
#include <string.h> #include <string.h>
#include "hal/misc.h" #include "hal/misc.h"
//TODO: IDF-7499
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@ -33,7 +32,7 @@ extern "C" {
#define gpspi_flash_ll_get_hw(host_id) ( ((host_id)==SPI2_HOST) ? &GPSPI2 : ({abort();(spi_dev_t*)0;}) ) #define gpspi_flash_ll_get_hw(host_id) ( ((host_id)==SPI2_HOST) ? &GPSPI2 : ({abort();(spi_dev_t*)0;}) )
#define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 ) #define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 )
typedef typeof(GPSPI2.clock) gpspi_flash_ll_clock_reg_t; typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t;
#define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ (80) #define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ (80)
/*------------------------------------------------------------------------------ /*------------------------------------------------------------------------------
@ -46,18 +45,17 @@ typedef typeof(GPSPI2.clock) gpspi_flash_ll_clock_reg_t;
*/ */
static inline void gpspi_flash_ll_reset(spi_dev_t *dev) static inline void gpspi_flash_ll_reset(spi_dev_t *dev)
{ {
// dev->user.val = 0; dev->user.val = 0;
// dev->ctrl.val = 0; dev->ctrl.val = 0;
// dev->clk_gate.clk_en = 1; dev->clk_gate.clk_en = 1;
// dev->clk_gate.mst_clk_active = 1; dev->clk_gate.mst_clk_active = 1;
// dev->clk_gate.mst_clk_sel = 1; dev->clk_gate.mst_clk_sel = 1;
// dev->dma_conf.val = 0; dev->dma_conf.val = 0;
// dev->dma_conf.tx_seg_trans_clr_en = 1; dev->dma_conf.slv_tx_seg_trans_clr_en = 1;
// dev->dma_conf.rx_seg_trans_clr_en = 1; dev->dma_conf.slv_rx_seg_trans_clr_en = 1;
// dev->dma_conf.dma_seg_trans_en = 0; dev->dma_conf.dma_slv_seg_trans_en = 0;
abort(); //TODO: IDF-7499
} }
/** /**
@ -81,21 +79,20 @@ static inline bool gpspi_flash_ll_cmd_is_done(const spi_dev_t *dev)
*/ */
static inline void gpspi_flash_ll_get_buffer_data(spi_dev_t *dev, void *buffer, uint32_t read_len) static inline void gpspi_flash_ll_get_buffer_data(spi_dev_t *dev, void *buffer, uint32_t read_len)
{ {
// if (((intptr_t)buffer % 4 == 0) && (read_len % 4 == 0)) { if (((intptr_t)buffer % 4 == 0) && (read_len % 4 == 0)) {
// // If everything is word-aligned, do a faster memcpy // If everything is word-aligned, do a faster memcpy
// memcpy(buffer, (void *)dev->data_buf, read_len); memcpy(buffer, (void *)dev->data_buf, read_len);
// } else { } else {
// // Otherwise, slow(er) path copies word by word // Otherwise, slow(er) path copies word by word
// int copy_len = read_len; int copy_len = read_len;
// for (int i = 0; i < (read_len + 3) / 4; i++) { for (int i = 0; i < (read_len + 3) / 4; i++) {
// int word_len = MIN(sizeof(uint32_t), copy_len); int word_len = MIN(sizeof(uint32_t), copy_len);
// uint32_t word = dev->data_buf[i]; uint32_t word = dev->data_buf[i].buf;
// memcpy(buffer, &word, word_len); memcpy(buffer, &word, word_len);
// buffer = (void *)((intptr_t)buffer + word_len); buffer = (void *)((intptr_t)buffer + word_len);
// copy_len -= word_len; copy_len -= word_len;
// } }
// } }
abort(); //TODO: IDF-7499
} }
/** /**
@ -106,8 +103,7 @@ static inline void gpspi_flash_ll_get_buffer_data(spi_dev_t *dev, void *buffer,
*/ */
static inline void gpspi_flash_ll_write_word(spi_dev_t *dev, uint32_t word) static inline void gpspi_flash_ll_write_word(spi_dev_t *dev, uint32_t word)
{ {
// dev->data_buf[0] = word; dev->data_buf[0].buf = word;
abort(); //TODO: IDF-7499
} }
/** /**
@ -119,17 +115,16 @@ static inline void gpspi_flash_ll_write_word(spi_dev_t *dev, uint32_t word)
*/ */
static inline void gpspi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *buffer, uint32_t length) static inline void gpspi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *buffer, uint32_t length)
{ {
// // Load data registers, word at a time // Load data registers, word at a time
// int num_words = (length + 3) / 4; int num_words = (length + 3) / 4;
// for (int i = 0; i < num_words; i++) { for (int i = 0; i < num_words; i++) {
// uint32_t word = 0; uint32_t word = 0;
// uint32_t word_len = MIN(length, sizeof(word)); uint32_t word_len = MIN(length, sizeof(word));
// memcpy(&word, buffer, word_len); memcpy(&word, buffer, word_len);
// dev->data_buf[i] = word; dev->data_buf[i].buf = word;
// length -= word_len; length -= word_len;
// buffer = (void *)((intptr_t)buffer + word_len); buffer = (void *)((intptr_t)buffer + word_len);
// } }
abort(); //TODO: IDF-7499
} }
/** /**
@ -141,7 +136,6 @@ static inline void gpspi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *bu
*/ */
static inline void gpspi_flash_ll_user_start(spi_dev_t *dev, bool pe_ops) static inline void gpspi_flash_ll_user_start(spi_dev_t *dev, bool pe_ops)
{ {
dev->ctrl.hold_pol = 1;
dev->cmd.update = 1; dev->cmd.update = 1;
while (dev->cmd.update); while (dev->cmd.update);
dev->cmd.usr = 1; dev->cmd.usr = 1;
@ -264,7 +258,7 @@ static inline void gpspi_flash_ll_set_read_mode(spi_dev_t *dev, esp_flash_io_mod
*/ */
static inline void gpspi_flash_ll_set_clock(spi_dev_t *dev, gpspi_flash_ll_clock_reg_t *clock_val) static inline void gpspi_flash_ll_set_clock(spi_dev_t *dev, gpspi_flash_ll_clock_reg_t *clock_val)
{ {
dev->clock.val = (*clock_val).val; dev->clock.val = *clock_val;
} }
/** /**
@ -344,10 +338,9 @@ static inline void gpspi_flash_ll_set_addr_bitlen(spi_dev_t *dev, uint32_t bitle
*/ */
static inline void gpspi_flash_ll_set_usr_address(spi_dev_t *dev, uint32_t addr, uint32_t bitlen) static inline void gpspi_flash_ll_set_usr_address(spi_dev_t *dev, uint32_t addr, uint32_t bitlen)
{ {
// // The blank region should be all ones // The blank region should be all ones
// uint32_t padding_ones = (bitlen == 32? 0 : UINT32_MAX >> bitlen); uint32_t padding_ones = (bitlen == 32? 0 : UINT32_MAX >> bitlen);
// dev->addr = (addr << (32 - bitlen)) | padding_ones; dev->addr.val = (addr << (32 - bitlen)) | padding_ones;
abort(); //TODO: IDF-7499
} }
/** /**
@ -358,8 +351,7 @@ static inline void gpspi_flash_ll_set_usr_address(spi_dev_t *dev, uint32_t addr,
*/ */
static inline void gpspi_flash_ll_set_address(spi_dev_t *dev, uint32_t addr) static inline void gpspi_flash_ll_set_address(spi_dev_t *dev, uint32_t addr)
{ {
// dev->addr = addr; dev->addr.val = addr;
abort(); //TODO: IDF-7499
} }
/** /**
@ -371,7 +363,7 @@ static inline void gpspi_flash_ll_set_address(spi_dev_t *dev, uint32_t addr)
static inline void gpspi_flash_ll_set_dummy(spi_dev_t *dev, uint32_t dummy_n) static inline void gpspi_flash_ll_set_dummy(spi_dev_t *dev, uint32_t dummy_n)
{ {
dev->user.usr_dummy = dummy_n ? 1 : 0; dev->user.usr_dummy = dummy_n ? 1 : 0;
dev->user1.usr_dummy_cyclelen = dummy_n - 1; HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user1, usr_dummy_cyclelen, dummy_n - 1);
} }
/** /**

4
components/hal/spi_flash_hal_common.inc
View File

@ -101,6 +101,7 @@ esp_err_t spi_flash_hal_configure_host_io_mode(
return ESP_ERR_NOT_SUPPORTED; return ESP_ERR_NOT_SUPPORTED;
} }
#ifndef GPSPI_BUILD
#if SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT #if SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT
// The CONTROL_DUMMY_OUTPUT feature is used to control M7-M0 bits. // The CONTROL_DUMMY_OUTPUT feature is used to control M7-M0 bits.
spi_flash_ll_set_dummy_out(dev, (conf_required? 1: 0), 1); spi_flash_ll_set_dummy_out(dev, (conf_required? 1: 0), 1);
@ -129,6 +130,9 @@ esp_err_t spi_flash_hal_configure_host_io_mode(
spi_flash_ll_set_extra_address(dev, 0); spi_flash_ll_set_extra_address(dev, 0);
} }
#endif #endif
#else
gpspi_flash_ll_set_dummy_out(dev, (conf_required? 1: 0), 1);
#endif
if (command >= 0x100) { if (command >= 0x100) {
spi_flash_ll_set_command(dev, command, 16); spi_flash_ll_set_command(dev, command, 16);

26
components/spi_flash/esp_flash_spi_init.c
View File

@ -122,7 +122,7 @@ esp_flash_t *esp_flash_default_chip = NULL;
#endif //!CONFIG_SPI_FLASH_AUTO_SUSPEND #endif //!CONFIG_SPI_FLASH_AUTO_SUSPEND
#endif // Other target #endif // Other target
static IRAM_ATTR NOINLINE_ATTR void cs_initialize(esp_flash_t *chip, const esp_flash_spi_device_config_t *config, bool use_iomux, int cs_id) static IRAM_ATTR NOINLINE_ATTR void cs_initialize(esp_flash_t *chip, const esp_flash_spi_device_config_t *config, bool cs_use_iomux, int cs_id)
{ {
//Not using spicommon_cs_initialize since we don't want to put the whole //Not using spicommon_cs_initialize since we don't want to put the whole
//spi_periph_signal into the DRAM. Copy these data from flash before the //spi_periph_signal into the DRAM. Copy these data from flash before the
@ -139,9 +139,9 @@ static IRAM_ATTR NOINLINE_ATTR void cs_initialize(esp_flash_t *chip, const esp_f
//To avoid the panic caused by flash data line conflicts during cs line //To avoid the panic caused by flash data line conflicts during cs line
//initialization, disable the cache temporarily //initialization, disable the cache temporarily
chip->os_func->start(chip->os_func_data); chip->os_func->start(chip->os_func_data);
PIN_INPUT_ENABLE(iomux_reg); gpio_hal_input_enable(&gpio_hal, cs_io_num);
if (use_iomux) { if (cs_use_iomux) {
gpio_hal_iomux_func_sel(iomux_reg, spics_func); gpio_hal_func_sel(&gpio_hal, cs_io_num, spics_func);
} else { } else {
gpio_hal_output_enable(&gpio_hal, cs_io_num); gpio_hal_output_enable(&gpio_hal, cs_io_num);
gpio_hal_od_disable(&gpio_hal, cs_io_num); gpio_hal_od_disable(&gpio_hal, cs_io_num);
@ -175,6 +175,16 @@ static bool bus_using_iomux(spi_host_device_t host)
return true; return true;
} }
static bool cs_using_iomux(const esp_flash_spi_device_config_t *config)
{
bool use_iomux = true;
CHECK_IOMUX_PIN(config->host_id, spics);
if (config->cs_io_num != spi_periph_signal[config->host_id].spics0_iomux_pin) {
use_iomux = false;
}
return use_iomux;
}
static esp_err_t acquire_spi_device(const esp_flash_spi_device_config_t *config, int* out_dev_id, spi_bus_lock_dev_handle_t* out_dev_handle) static esp_err_t acquire_spi_device(const esp_flash_spi_device_config_t *config, int* out_dev_id, spi_bus_lock_dev_handle_t* out_dev_handle)
{ {
esp_err_t ret = ESP_OK; esp_err_t ret = ESP_OK;
@ -274,7 +284,7 @@ esp_err_t spi_bus_add_flash_device(esp_flash_t **out_chip, const esp_flash_spi_d
} }
// The cs_id inside `config` is deprecated, use the `dev_id` provided by the bus lock instead. // The cs_id inside `config` is deprecated, use the `dev_id` provided by the bus lock instead.
cs_initialize(chip, config, use_iomux, dev_id); cs_initialize(chip, config, cs_using_iomux(config), dev_id);
*out_chip = chip; *out_chip = chip;
return ret; return ret;
fail: fail:
@ -317,14 +327,14 @@ static void s_esp_flash_choose_correct_mode(memspi_host_config_t *cfg)
static const char *mode = FLASH_MODE_STRING; static const char *mode = FLASH_MODE_STRING;
if (bootloader_flash_is_octal_mode_enabled()) { if (bootloader_flash_is_octal_mode_enabled()) {
#if !CONFIG_ESPTOOLPY_FLASHMODE_OPI #if !CONFIG_ESPTOOLPY_FLASHMODE_OPI
ESP_EARLY_LOGW(TAG, "Octal flash chip is using but %s mode is selected, will automatically swich to Octal mode", mode); ESP_EARLY_LOGW(TAG, "Octal flash chip is using but %s mode is selected, will automatically switch to Octal mode", mode);
cfg->octal_mode_en = 1; cfg->octal_mode_en = 1;
cfg->default_io_mode = SPI_FLASH_OPI_STR; cfg->default_io_mode = SPI_FLASH_OPI_STR;
default_chip.read_mode = SPI_FLASH_OPI_STR; default_chip.read_mode = SPI_FLASH_OPI_STR;
#endif #endif
} else { } else {
#if CONFIG_ESPTOOLPY_FLASHMODE_OPI #if CONFIG_ESPTOOLPY_FLASHMODE_OPI
ESP_EARLY_LOGW(TAG, "Quad flash chip is using but %s flash mode is selected, will automatically swich to DIO mode", mode); ESP_EARLY_LOGW(TAG, "Quad flash chip is using but %s flash mode is selected, will automatically switch to DIO mode", mode);
cfg->octal_mode_en = 0; cfg->octal_mode_en = 0;
cfg->default_io_mode = SPI_FLASH_DIO; cfg->default_io_mode = SPI_FLASH_DIO;
default_chip.read_mode = SPI_FLASH_DIO; default_chip.read_mode = SPI_FLASH_DIO;
@ -357,7 +367,7 @@ esp_err_t esp_flash_init_default_chip(void)
#endif #endif
// For chips need time tuning, get value directely from system here. // For chips need time tuning, get value directly from system here.
#if SOC_SPI_MEM_SUPPORT_TIMING_TUNING #if SOC_SPI_MEM_SUPPORT_TIMING_TUNING
if (spi_flash_timing_is_tuned()) { if (spi_flash_timing_is_tuned()) {
cfg.using_timing_tuning = 1; cfg.using_timing_tuning = 1;

16
components/spi_flash/test_apps/esp_flash/main/test_esp_flash_def.h
View File

@ -68,7 +68,7 @@
#define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP #define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP
#define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS #define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 #elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6
#define SPI1_CS_IO 26 //the pin which is usually used by the PSRAM cs #define SPI1_CS_IO 26 //the pin which is usually used by the PSRAM cs
#define SPI1_HD_IO 27 //the pin which is usually used by the PSRAM hd #define SPI1_HD_IO 27 //the pin which is usually used by the PSRAM hd
#define SPI1_WP_IO 28 //the pin which is usually used by the PSRAM wp #define SPI1_WP_IO 28 //the pin which is usually used by the PSRAM wp
@ -88,14 +88,14 @@
#define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP #define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP
#define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS #define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS
#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 #elif CONFIG_IDF_TARGET_ESP32H2
#define FSPI_PIN_NUM_MOSI 7 #define FSPI_PIN_NUM_MOSI 5
#define FSPI_PIN_NUM_MISO 2 #define FSPI_PIN_NUM_MISO 0
#define FSPI_PIN_NUM_CLK 6 #define FSPI_PIN_NUM_CLK 4
#define FSPI_PIN_NUM_HD 4 #define FSPI_PIN_NUM_HD 3
#define FSPI_PIN_NUM_WP 5 #define FSPI_PIN_NUM_WP 2
#define FSPI_PIN_NUM_CS 17 #define FSPI_PIN_NUM_CS 1
// Just use the same pins for HSPI // Just use the same pins for HSPI
#define HSPI_PIN_NUM_MOSI FSPI_PIN_NUM_MOSI #define HSPI_PIN_NUM_MOSI FSPI_PIN_NUM_MOSI