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feat(i2c): Add config option for i2c isr handler can put in flash

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This commit is contained in:
C.S.M 2025-02-10 13:49:21 +08:00
parent 7ff0087d3b
commit 2458734108
5 changed files with 19 additions and 4 deletions
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7
components/esp_driver_i2c/Kconfig
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@ -2,6 +2,7 @@ menu "ESP-Driver:I2C Configurations"
depends on SOC_I2C_SUPPORTED
config I2C_ISR_IRAM_SAFE
bool "I2C ISR IRAM-Safe"
select I2C_MASTER_ISR_HANDLER_IN_IRAM
default n
help
Ensure the I2C interrupt is IRAM-Safe by allowing the interrupt handler to be
@ -23,4 +24,10 @@ menu "ESP-Driver:I2C Configurations"
help
I2C slave version 2 solves some existing known issues. Such as write/read workflow, stretch handling, etc.
config I2C_MASTER_ISR_HANDLER_IN_IRAM
bool "Place I2C master ISR handler into IRAM"
default y
help
Place I2C master ISR handler into IRAM for better performance and fewer cache misses.
endmenu # I2C Configurations

4
components/esp_driver_i2c/i2c_master.c
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@ -646,7 +646,7 @@ static esp_err_t s_i2c_transaction_start(i2c_master_dev_handle_t i2c_dev, int xf
///////////////////////////////I2C DRIVERS//////////////////////////////////////////////////////////////
IRAM_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_master)
I2C_MASTER_ISR_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_master)
{
i2c_hal_context_t *hal = &i2c_master->base->hal;
@ -681,7 +681,7 @@ IRAM_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_master)
#endif
}
static void IRAM_ATTR i2c_master_isr_handler_default(void *arg)
static void i2c_master_isr_handler_default(void *arg)
{
i2c_master_bus_handle_t i2c_master = (i2c_master_bus_t*) arg;

8
components/esp_driver_i2c/i2c_private.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -42,6 +42,12 @@ extern "C" {
#define LP_I2C_BUS_CLK_ATOMIC() PERIPH_RCC_ATOMIC()
#endif
#ifdef CONFIG_I2C_MASTER_ISR_HANDLER_IN_IRAM
#define I2C_MASTER_ISR_ATTR IRAM_ATTR
#else
#define I2C_MASTER_ISR_ATTR
#endif
#if CONFIG_I2C_ISR_IRAM_SAFE
#define I2C_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
#else

2
components/esp_driver_i2c/linker.lf
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@ -1,6 +1,8 @@
[mapping:i2c_driver]
archive: libesp_driver_i2c.a
entries:
if I2C_MASTER_ISR_HANDLER_IN_IRAM = y:
i2c_master: i2c_master_isr_handler_default (noflash)
if I2C_ISR_IRAM_SAFE = y:
i2c_master: s_i2c_send_command_async (noflash)
i2c_master: s_i2c_write_command (noflash)

2
components/esp_driver_i2c/test_apps/i2c_test_apps/pytest_i2c.py
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@ -1,4 +1,4 @@
# SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
# SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: CC0-1.0
import pytest
from pytest_embedded import Dut