Merge branch 'bugfix/fix_several_bugs_in_i2s_v5.0' into 'release/v5.0'

i2s: fix several bugs in std and tdm mode (v5.0)

See merge request espressif/esp-idf!23670
This commit is contained in:
morris 2023-05-12 11:03:37 +08:00
commit 2b483c98c4
5 changed files with 11 additions and 8 deletions

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@ -62,7 +62,9 @@ static esp_err_t i2s_std_set_clock(i2s_chan_handle_t handle, const i2s_std_clk_c
{ {
esp_err_t ret = ESP_OK; esp_err_t ret = ESP_OK;
i2s_std_config_t *std_cfg = (i2s_std_config_t *)(handle->mode_info); i2s_std_config_t *std_cfg = (i2s_std_config_t *)(handle->mode_info);
ESP_RETURN_ON_FALSE(std_cfg->slot_cfg.data_bit_width != I2S_DATA_BIT_WIDTH_24BIT || i2s_data_bit_width_t real_slot_bit = (int)std_cfg->slot_cfg.slot_bit_width < (int)std_cfg->slot_cfg.data_bit_width ?
std_cfg->slot_cfg.data_bit_width : std_cfg->slot_cfg.slot_bit_width;
ESP_RETURN_ON_FALSE(real_slot_bit != I2S_DATA_BIT_WIDTH_24BIT ||
(clk_cfg->mclk_multiple % 3 == 0), ESP_ERR_INVALID_ARG, TAG, (clk_cfg->mclk_multiple % 3 == 0), ESP_ERR_INVALID_ARG, TAG,
"The 'mclk_multiple' should be the multiple of 3 while using 24-bit data width"); "The 'mclk_multiple' should be the multiple of 3 while using 24-bit data width");

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@ -94,6 +94,7 @@ static esp_err_t i2s_tdm_set_clock(i2s_chan_handle_t handle, const i2s_tdm_clk_c
static esp_err_t i2s_tdm_set_slot(i2s_chan_handle_t handle, const i2s_tdm_slot_config_t *slot_cfg) static esp_err_t i2s_tdm_set_slot(i2s_chan_handle_t handle, const i2s_tdm_slot_config_t *slot_cfg)
{ {
ESP_RETURN_ON_FALSE(slot_cfg->slot_mask, ESP_ERR_INVALID_ARG, TAG, "At least one channel should be enabled");
/* Update the total slot num and active slot num */ /* Update the total slot num and active slot num */
handle->active_slot = slot_cfg->slot_mode == I2S_SLOT_MODE_MONO ? 1 : __builtin_popcount(slot_cfg->slot_mask); handle->active_slot = slot_cfg->slot_mode == I2S_SLOT_MODE_MONO ? 1 : __builtin_popcount(slot_cfg->slot_mask);
uint32_t max_slot_num = 32 - __builtin_clz(slot_cfg->slot_mask); uint32_t max_slot_num = 32 - __builtin_clz(slot_cfg->slot_mask);

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@ -145,7 +145,7 @@ extern "C" {
.ws_width = bits_per_sample, \ .ws_width = bits_per_sample, \
.ws_pol = false, \ .ws_pol = false, \
.bit_shift = true, \ .bit_shift = true, \
.left_align = false, \ .left_align = true, \
.big_endian = false, \ .big_endian = false, \
.bit_order_lsb = false \ .bit_order_lsb = false \
} }
@ -164,7 +164,7 @@ extern "C" {
.ws_width = 1, \ .ws_width = 1, \
.ws_pol = true, \ .ws_pol = true, \
.bit_shift = true, \ .bit_shift = true, \
.left_align = false, \ .left_align = true, \
.big_endian = false, \ .big_endian = false, \
.bit_order_lsb = false \ .bit_order_lsb = false \
} }
@ -182,7 +182,7 @@ extern "C" {
.ws_width = bits_per_sample, \ .ws_width = bits_per_sample, \
.ws_pol = false, \ .ws_pol = false, \
.bit_shift = false, \ .bit_shift = false, \
.left_align = false, \ .left_align = true, \
.big_endian = false, \ .big_endian = false, \
.bit_order_lsb = false \ .bit_order_lsb = false \
} }

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@ -246,7 +246,7 @@ void i2s_hal_tdm_set_tx_slot(i2s_hal_context_t *hal, bool is_slave, const i2s_ha
i2s_ll_tx_set_active_chan_mask(hal->dev, (slot_cfg->slot_mode == I2S_SLOT_MODE_MONO) ? i2s_ll_tx_set_active_chan_mask(hal->dev, (slot_cfg->slot_mode == I2S_SLOT_MODE_MONO) ?
I2S_TDM_SLOT0 : (uint32_t)slot_cfg->tdm.slot_mask); I2S_TDM_SLOT0 : (uint32_t)slot_cfg->tdm.slot_mask);
i2s_ll_tx_set_skip_mask(hal->dev, slot_cfg->tdm.skip_mask); i2s_ll_tx_set_skip_mask(hal->dev, slot_cfg->tdm.skip_mask);
i2s_ll_tx_set_half_sample_bit(hal->dev, __builtin_popcount(slot_cfg->tdm.slot_mask) * slot_bit_width / 2); i2s_ll_tx_set_half_sample_bit(hal->dev, total_slot * slot_bit_width / 2);
i2s_ll_tx_set_bit_order(hal->dev, slot_cfg->tdm.bit_order_lsb); i2s_ll_tx_set_bit_order(hal->dev, slot_cfg->tdm.bit_order_lsb);
i2s_ll_tx_enable_left_align(hal->dev, slot_cfg->tdm.left_align); i2s_ll_tx_enable_left_align(hal->dev, slot_cfg->tdm.left_align);
i2s_ll_tx_enable_big_endian(hal->dev, slot_cfg->tdm.big_endian); i2s_ll_tx_enable_big_endian(hal->dev, slot_cfg->tdm.big_endian);
@ -279,7 +279,7 @@ void i2s_hal_tdm_set_rx_slot(i2s_hal_context_t *hal, bool is_slave, const i2s_ha
/* In mono mode, there only should be one slot enabled, other inactive slots will transmit same data as enabled slot */ /* In mono mode, there only should be one slot enabled, other inactive slots will transmit same data as enabled slot */
i2s_ll_rx_set_active_chan_mask(hal->dev, (slot_cfg->slot_mode == I2S_SLOT_MODE_MONO) ? i2s_ll_rx_set_active_chan_mask(hal->dev, (slot_cfg->slot_mode == I2S_SLOT_MODE_MONO) ?
I2S_TDM_SLOT0 : (uint32_t)slot_cfg->tdm.slot_mask); I2S_TDM_SLOT0 : (uint32_t)slot_cfg->tdm.slot_mask);
i2s_ll_rx_set_half_sample_bit(hal->dev, __builtin_popcount(slot_cfg->tdm.slot_mask) * slot_bit_width / 2); i2s_ll_rx_set_half_sample_bit(hal->dev, total_slot * slot_bit_width / 2);
i2s_ll_rx_set_bit_order(hal->dev, slot_cfg->tdm.bit_order_lsb); i2s_ll_rx_set_bit_order(hal->dev, slot_cfg->tdm.bit_order_lsb);
i2s_ll_rx_enable_left_align(hal->dev, slot_cfg->tdm.left_align); i2s_ll_rx_enable_left_align(hal->dev, slot_cfg->tdm.left_align);
i2s_ll_rx_enable_big_endian(hal->dev, slot_cfg->tdm.big_endian); i2s_ll_rx_enable_big_endian(hal->dev, slot_cfg->tdm.big_endian);

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@ -357,9 +357,9 @@ Here is the table of the real data on the line with different :cpp:member:`i2s_s
| | +-----------+----------+----------+----------+----------+----------+----------+----------+----------+ | | +-----------+----------+----------+----------+----------+----------+----------+----------+----------+
| | | both | 0x0001 | 0x0001 | 0x0002 | 0x0002 | 0x0003 | 0x0003 | 0x0004 | 0x0004 | | | | both | 0x0001 | 0x0001 | 0x0002 | 0x0002 | 0x0003 | 0x0003 | 0x0004 | 0x0004 |
| +-----------+-----------+----------+----------+----------+----------+----------+----------+----------+----------+ | +-----------+-----------+----------+----------+----------+----------+----------+----------+----------+----------+
| | stereo | left | 0x0001 | 0x0001 | 0x0003 | 0x0003 | 0x0005 | 0x0005 | 0x0007 | 0x0007 | | | stereo | left | 0x0001 | 0x0000 | 0x0003 | 0x0000 | 0x0005 | 0x0000 | 0x0007 | 0x0000 |
| | +-----------+----------+----------+----------+----------+----------+----------+----------+----------+ | | +-----------+----------+----------+----------+----------+----------+----------+----------+----------+
| | | right | 0x0002 | 0x0002 | 0x0004 | 0x0004 | 0x0006 | 0x0006 | 0x0008 | 0x0008 | | | | right | 0x0000 | 0x0002 | 0x0000 | 0x0004 | 0x0000 | 0x0006 | 0x0000 | 0x0008 |
| | +-----------+----------+----------+----------+----------+----------+----------+----------+----------+ | | +-----------+----------+----------+----------+----------+----------+----------+----------+----------+
| | | both | 0x0001 | 0x0002 | 0x0003 | 0x0004 | 0x0005 | 0x0006 | 0x0007 | 0x0008 | | | | both | 0x0001 | 0x0002 | 0x0003 | 0x0004 | 0x0005 | 0x0006 | 0x0007 | 0x0008 |
+----------------+-----------+-----------+----------+----------+----------+----------+----------+----------+----------+----------+ +----------------+-----------+-----------+----------+----------+----------+----------+----------+----------+----------+----------+