From 4ee958df57f3b3ea3f727b20aafc9114f93cd584 Mon Sep 17 00:00:00 2001 From: muhaidong Date: Mon, 6 Nov 2023 18:01:07 +0800 Subject: [PATCH 1/2] fix(wifi): fix deinit init wifi scan fail issue --- components/esp_phy/src/phy_init.c | 10 +++++++--- components/soc/esp32/include/soc/dport_reg.h | 4 +++- components/soc/esp32s2/include/soc/syscon_reg.h | 3 ++- 3 files changed, 12 insertions(+), 5 deletions(-) diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c index e70b0ea104..2586438603 100644 --- a/components/esp_phy/src/phy_init.c +++ b/components/esp_phy/src/phy_init.c @@ -295,14 +295,18 @@ void IRAM_ATTR esp_wifi_bt_power_domain_on(void) _lock_acquire(&s_wifi_bt_pd_controller.lock); if (s_wifi_bt_pd_controller.count++ == 0) { CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD); - -#if !CONFIG_IDF_TARGET_ESP32 + esp_rom_delay_us(10); + wifi_bt_common_module_enable(); +#if CONFIG_IDF_TARGET_ESP32 + DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU); + DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU); +#else // modem reset when power on SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU); CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU); #endif - CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO); + wifi_bt_common_module_disable(); } _lock_release(&s_wifi_bt_pd_controller.lock); #endif // SOC_PM_SUPPORT_MODEM_PD || SOC_PM_SUPPORT_WIFI_PD diff --git a/components/soc/esp32/include/soc/dport_reg.h b/components/soc/esp32/include/soc/dport_reg.h index 3091138c39..74b87421df 100644 --- a/components/soc/esp32/include/soc/dport_reg.h +++ b/components/soc/esp32/include/soc/dport_reg.h @@ -1077,8 +1077,10 @@ #define DPORT_RW_BTMAC_RST BIT(9) #define DPORT_RW_BTLP_RST BIT(10) +//ESP32 should not reset FE in esp_wifi_bt_power_domain_on(). +//The FE of ESP32 is not in the WIFI PD power domain. +//When turning off WIFI PD, the FE will not power down, so phy_wakeup_init() did not rewrite the FE register. #define MODEM_RESET_FIELD_WHEN_PU (DPORT_WIFIBB_RST | \ - DPORT_FE_RST | \ DPORT_WIFIMAC_RST | \ DPORT_BTBB_RST | \ DPORT_BTMAC_RST | \ diff --git a/components/soc/esp32s2/include/soc/syscon_reg.h b/components/soc/esp32s2/include/soc/syscon_reg.h index 91d9e15375..62e031b55b 100644 --- a/components/soc/esp32s2/include/soc/syscon_reg.h +++ b/components/soc/esp32s2/include/soc/syscon_reg.h @@ -443,7 +443,8 @@ extern "C" { #define DPORT_WIFI_CLK_BT_EN_V 0x61 #define DPORT_WIFI_CLK_BT_EN_S 11 /* Mask for clock bits used by both WIFI and Bluetooth, bit 0, 3, 6, 7, 8, 9 */ -#define DPORT_WIFI_CLK_WIFI_BT_COMMON_M 0x000003c9 +#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x000003c9 +#define DPORT_WIFI_CLK_WIFI_BT_COMMON_M SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M /* Digital team to check */ //bluetooth baseband bit11 From 3937e35a08b526840dd3a8d6f2cb3fb9892305d5 Mon Sep 17 00:00:00 2001 From: muhaidong Date: Thu, 9 Nov 2023 14:17:54 +0800 Subject: [PATCH 2/2] change(hal): remove useless code from periph_ll_wifi_bt_module_enable_clk --- components/esp_hw_support/periph_ctrl.c | 4 ++-- components/hal/esp32/include/hal/clk_gate_ll.h | 8 +++----- components/hal/esp32c2/include/hal/clk_gate_ll.h | 8 +++----- components/hal/esp32c3/include/hal/clk_gate_ll.h | 8 +++----- components/hal/esp32s2/include/hal/clk_gate_ll.h | 8 +++----- components/hal/esp32s3/include/hal/clk_gate_ll.h | 8 +++----- 6 files changed, 17 insertions(+), 27 deletions(-) diff --git a/components/esp_hw_support/periph_ctrl.c b/components/esp_hw_support/periph_ctrl.c index 8a226b236f..83b1f8ccbf 100644 --- a/components/esp_hw_support/periph_ctrl.c +++ b/components/esp_hw_support/periph_ctrl.c @@ -47,7 +47,7 @@ IRAM_ATTR void wifi_bt_common_module_enable(void) { portENTER_CRITICAL_SAFE(&periph_spinlock); if (ref_counts[PERIPH_WIFI_BT_COMMON_MODULE] == 0) { - periph_ll_wifi_bt_module_enable_clk_clear_rst(); + periph_ll_wifi_bt_module_enable_clk(); } ref_counts[PERIPH_WIFI_BT_COMMON_MODULE]++; portEXIT_CRITICAL_SAFE(&periph_spinlock); @@ -58,7 +58,7 @@ IRAM_ATTR void wifi_bt_common_module_disable(void) portENTER_CRITICAL_SAFE(&periph_spinlock); ref_counts[PERIPH_WIFI_BT_COMMON_MODULE]--; if (ref_counts[PERIPH_WIFI_BT_COMMON_MODULE] == 0) { - periph_ll_wifi_bt_module_disable_clk_set_rst(); + periph_ll_wifi_bt_module_disable_clk(); } portEXIT_CRITICAL_SAFE(&periph_spinlock); } diff --git a/components/hal/esp32/include/hal/clk_gate_ll.h b/components/hal/esp32/include/hal/clk_gate_ll.h index 8944c22ba2..7afaaf0548 100644 --- a/components/hal/esp32/include/hal/clk_gate_ll.h +++ b/components/hal/esp32/include/hal/clk_gate_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -228,16 +228,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph) DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); } -static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void) +static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void) { DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M); - DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0); } -static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void) +static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void) { DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M); - DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0); } static inline void periph_ll_reset(periph_module_t periph) diff --git a/components/hal/esp32c2/include/hal/clk_gate_ll.h b/components/hal/esp32c2/include/hal/clk_gate_ll.h index 522efa77ff..37cba21134 100644 --- a/components/hal/esp32c2/include/hal/clk_gate_ll.h +++ b/components/hal/esp32c2/include/hal/clk_gate_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -166,16 +166,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph) DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); } -static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void) +static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void) { DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M); - DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0); } -static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void) +static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void) { DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M); - DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0); } static inline void periph_ll_reset(periph_module_t periph) diff --git a/components/hal/esp32c3/include/hal/clk_gate_ll.h b/components/hal/esp32c3/include/hal/clk_gate_ll.h index 8f8526e1a9..edbc6451fe 100644 --- a/components/hal/esp32c3/include/hal/clk_gate_ll.h +++ b/components/hal/esp32c3/include/hal/clk_gate_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -215,16 +215,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph) DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); } -static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void) +static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void) { DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M); - DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0); } -static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void) +static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void) { DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M); - DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0); } static inline void periph_ll_reset(periph_module_t periph) diff --git a/components/hal/esp32s2/include/hal/clk_gate_ll.h b/components/hal/esp32s2/include/hal/clk_gate_ll.h index a1ef5be97a..acc1ce0e54 100644 --- a/components/hal/esp32s2/include/hal/clk_gate_ll.h +++ b/components/hal/esp32s2/include/hal/clk_gate_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -241,16 +241,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph) DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); } -static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void) +static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void) { DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M); - DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0); } -static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void) +static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void) { DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M); - DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0); } static inline void periph_ll_reset(periph_module_t periph) diff --git a/components/hal/esp32s3/include/hal/clk_gate_ll.h b/components/hal/esp32s3/include/hal/clk_gate_ll.h index d3bd68d085..5e41f752fb 100644 --- a/components/hal/esp32s3/include/hal/clk_gate_ll.h +++ b/components/hal/esp32s3/include/hal/clk_gate_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -262,16 +262,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph) DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); } -static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void) +static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void) { DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M); - DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0); } -static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void) +static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void) { DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M); - DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0); } static inline void periph_ll_reset(periph_module_t periph)