Merge branch 'bugfix/docs_ulp_reg_rd_wr_instructions_v4.0' into 'release/v4.0'

Correct ULP REG_WR and REG_RD instruction for ESP32

See merge request espressif/esp-idf!7868

docs/en/api-guides/ulp_instruction_set.rst

@@ -478,12 +478,35 @@ Note that when accessing RTC memories and RTC registers, ULP coprocessor has low
    - *Step*          – relative shift from current position, in bytes
    - *Threshold*     – threshold value for branch condition
    - *Condition*:
+      - *EQ* (equal) – jump if value in R0 == threshold
+      - *LT* (less than) – jump if value in R0 < threshold
+      - *LE* (less or equal) – jump if value in R0 <= threshold
+      - *GT* (greater than) – jump if value in R0 > threshold
       - *GE* (greater or equal) – jump if value in R0 >= threshold
 
-      - *LT* (less than) – jump if value in R0 < threshold
 
 **Cycles**
-  2 cycles to execute, 2 cycles to fetch next instruction
+  Conditions *LT*, *GE*, *LE* and *GT*: 2 cycles to execute, 2 cycles to fetch next instruction
+
+  Conditions *LE* and *GT* are implemented in the assembler using one **JUMPR** instructions::
+
+    // JUMPR target, threshold, GT is implemented as:
+
+             JUMPR target, threshold+1, GE
+
+    // JUMPR target, threshold, LE is implemented as:
+    
+             JUMPR target, threshold + 1, LT
+
+  Conditions *EQ* is implemented in the assembler using two **JUMPR** instructions::
+
+    // JUMPR target, threshold, EQ is implemented as:
+    
+             JUMPR next, threshold + 1, GE
+             JUMPR target, threshold, GE
+    next:
+
+  Therefore the execution time will depend on the branches taken: either 2 cycles to execute + 2 cycles to fetch, or 4 cycles to execute + 4 cycles to fetch.
 
 **Description**
    The instruction makes a jump to a relative address if condition is true. Condition is the result of comparison of R0 register value and the threshold value.
@@ -828,9 +851,9 @@ Note that when accessing RTC memories and RTC registers, ULP coprocessor has low
    **REG_RD**   *Addr, High, Low*
 
 **Operands**
-  - *Addr* – register address, in 32-bit words
-  - *High* – High part of R0
-  - *Low* – Low part of R0
+  - *Addr* – Register address, in 32-bit words
+  - *High* – Register end bit number
+  - *Low* – Register start bit number
 
 **Cycles**
   4 cycles to execute, 4 cycles to fetch next instruction
@@ -838,14 +861,13 @@ Note that when accessing RTC memories and RTC registers, ULP coprocessor has low
 **Description**
   The instruction reads up to 16 bits from a peripheral register into a general purpose register: ``R0 = REG[Addr][High:Low]``.
 
-   This instruction can access registers in RTC_CNTL, RTC_IO, SENS, and RTC_I2C peripherals. Address of the the register, as seen from the ULP,
-   can be calculated from the address of the same register on the DPORT bus as follows::
+  This instruction can access registers in RTC_CNTL, RTC_IO, SENS, and RTC_I2C peripherals. Address of the the register, as seen from the ULP, can be calculated from the address of the same register on the DPORT bus as follows::
 
     addr_ulp = (addr_dport - DR_REG_RTCCNTL_BASE) / 4
 
 **Examples**::
 
-  1:        REG_RD      0x120, 2, 0     // load 4 bits: R0 = {12'b0, REG[0x120][7:4]}
+  1:        REG_RD      0x120, 7, 4     // load 4 bits: R0 = {12'b0, REG[0x120][7:4]}
 
 
 **REG_WR** – write to peripheral register
@@ -855,19 +877,18 @@ Note that when accessing RTC memories and RTC registers, ULP coprocessor has low
   **REG_WR**   *Addr, High, Low, Data*
 
 **Operands**
-  - *Addr* – register address, in 32-bit words.
-  - *High* – High part of R0
-  - *Low* – Low part of R0
-  - *Data* – value to write, 8 bits
+  - *Addr* – Register address, in 32-bit words.
+  - *High* – Register end bit number
+  - *Low* – Register start bit number
+  - *Data* – Value to write, 8 bits
 
 **Cycles**
   8 cycles to execute, 4 cycles to fetch next instruction
 
 **Description**
-   The instruction writes up to 8 bits from a general purpose register into a peripheral register. ``REG[Addr][High:Low] = data``
+  The instruction writes up to 8 bits from an immediate data value into a peripheral register: ``REG[Addr][High:Low] = data``.
 
-   This instruction can access registers in RTC_CNTL, RTC_IO, SENS, and RTC_I2C peripherals. Address of the the register, as seen from the ULP,
-   can be calculated from the address of the same register on the DPORT bus as follows::
+  This instruction can access registers in RTC_CNTL, RTC_IO, SENS, and RTC_I2C peripherals. Address of the the register, as seen from the ULP, can be calculated from the address of the same register on the DPORT bus as follows::
 
     addr_ulp = (addr_dport - DR_REG_RTCCNTL_BASE) / 4
 
@@ -920,8 +941,3 @@ WRITE_RTC_FIELD(rtc_reg, field, value)
     /* Set RTC_CNTL_ULP_CP_SLP_TIMER_EN field of RTC_CNTL_STATE0_REG to 0 */
     WRITE_RTC_FIELD(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN, 0)
 
-
-
-
-
-