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https://github.com/espressif/esp-idf
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Merge branch 'fix/p4_spi_slave_example_not_work_v5.4' into 'release/v5.4'
fix(driver_spi): fixed slave (and slave_hd) driver and example error with alignment check (v5.4) See merge request espressif/esp-idf!36403
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commit
473771bc14
@ -1143,7 +1143,7 @@ static SPI_MASTER_ISR_ATTR esp_err_t setup_priv_desc(spi_host_t *host, spi_trans
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if (send_ptr && bus_attr->dma_enabled) {
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if ((!esp_ptr_dma_capable(send_ptr) || tx_unaligned)) {
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ESP_RETURN_ON_FALSE(!(trans_desc->flags & SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL), ESP_ERR_INVALID_ARG, SPI_TAG, "Set flag SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL but TX buffer addr&len not align to %d, or not dma_capable", alignment);
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ESP_RETURN_ON_FALSE(!(trans_desc->flags & SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL), ESP_ERR_INVALID_ARG, SPI_TAG, "Set flag SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL but TX buffer addr&len not align to %d byte, or not dma_capable", alignment);
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//if txbuf in the desc not DMA-capable, or not bytes aligned to alignment, malloc a new one
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ESP_EARLY_LOGD(SPI_TAG, "Allocate TX buffer for DMA");
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tx_byte_len = (tx_byte_len + alignment - 1) & (~(alignment - 1)); // up align alignment
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@ -1163,7 +1163,7 @@ static SPI_MASTER_ISR_ATTR esp_err_t setup_priv_desc(spi_host_t *host, spi_trans
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if (rcv_ptr && bus_attr->dma_enabled) {
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if ((!esp_ptr_dma_capable(rcv_ptr) || rx_unaligned)) {
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ESP_RETURN_ON_FALSE(!(trans_desc->flags & SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL), ESP_ERR_INVALID_ARG, SPI_TAG, "Set flag SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL but RX buffer addr&len not align to %d, or not dma_capable", alignment);
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ESP_RETURN_ON_FALSE(!(trans_desc->flags & SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL), ESP_ERR_INVALID_ARG, SPI_TAG, "Set flag SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL but RX buffer addr&len not align to %d byte, or not dma_capable", alignment);
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//if rxbuf in the desc not DMA-capable, or not aligned to alignment, malloc a new one
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ESP_EARLY_LOGD(SPI_TAG, "Allocate RX buffer for DMA");
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rx_byte_len = (rx_byte_len + alignment - 1) & (~(alignment - 1)); // up align alignment
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@ -332,7 +332,7 @@ static esp_err_t SPI_SLAVE_ISR_ATTR spi_slave_setup_priv_trans(spi_host_device_t
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if (spihost[host]->dma_enabled && trans->tx_buffer) {
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if ((!esp_ptr_dma_capable(trans->tx_buffer) || ((((uint32_t)trans->tx_buffer) | buffer_byte_len) & (alignment - 1)))) {
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ESP_RETURN_ON_FALSE_ISR(trans->flags & SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO, ESP_ERR_INVALID_ARG, SPI_TAG, "TX buffer addr&len not align to %d, or not dma_capable", alignment);
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ESP_RETURN_ON_FALSE_ISR(trans->flags & SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO, ESP_ERR_INVALID_ARG, SPI_TAG, "TX buffer addr&len not align to %d byte, or not dma_capable", alignment);
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//if txbuf in the desc not DMA-capable, or not align to "alignment", malloc a new one
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ESP_EARLY_LOGD(SPI_TAG, "Allocate TX buffer for DMA");
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buffer_byte_len = (buffer_byte_len + alignment - 1) & (~(alignment - 1)); // up align to "alignment"
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@ -349,7 +349,7 @@ static esp_err_t SPI_SLAVE_ISR_ATTR spi_slave_setup_priv_trans(spi_host_device_t
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}
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if (spihost[host]->dma_enabled && trans->rx_buffer) {
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if ((!esp_ptr_dma_capable(trans->rx_buffer) || ((((uint32_t)trans->rx_buffer) | (trans->length + 7) / 8) & (alignment - 1)))) {
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ESP_RETURN_ON_FALSE_ISR(trans->flags & SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO, ESP_ERR_INVALID_ARG, SPI_TAG, "RX buffer addr&len not align to %d, or not dma_capable", alignment);
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ESP_RETURN_ON_FALSE_ISR(trans->flags & SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO, ESP_ERR_INVALID_ARG, SPI_TAG, "RX buffer addr&len not align to %d byte, or not dma_capable", alignment);
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//if rxbuf in the desc not DMA-capable, or not align to "alignment", malloc a new one
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ESP_EARLY_LOGD(SPI_TAG, "Allocate RX buffer for DMA");
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buffer_byte_len = (buffer_byte_len + alignment - 1) & (~(alignment - 1)); // up align to "alignment"
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@ -597,8 +597,8 @@ static esp_err_t s_spi_slave_hd_setup_priv_trans(spi_host_device_t host, spi_sla
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uint16_t alignment = spihost[host]->internal_mem_align_size;
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uint32_t byte_len = orig_trans->len;
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if (((uint32_t)orig_trans->data) | (byte_len & (alignment - 1))) {
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ESP_RETURN_ON_FALSE(orig_trans->flags & SPI_SLAVE_HD_TRANS_DMA_BUFFER_ALIGN_AUTO, ESP_ERR_INVALID_ARG, TAG, "data buffer addr&len not align to %d, or not dma_capable", alignment);
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if (((uint32_t)orig_trans->data | byte_len) & (alignment - 1)) {
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ESP_RETURN_ON_FALSE(orig_trans->flags & SPI_SLAVE_HD_TRANS_DMA_BUFFER_ALIGN_AUTO, ESP_ERR_INVALID_ARG, TAG, "data buffer addr&len not align to %d byte, or not dma_capable", alignment);
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byte_len = (byte_len + alignment - 1) & (~(alignment - 1)); // up align to alignment
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ESP_LOGD(TAG, "Re-allocate %s buffer of len %" PRIu32 " for DMA", (chan == SPI_SLAVE_CHAN_TX) ? "TX" : "RX", byte_len);
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priv_trans->aligned_buffer = heap_caps_aligned_alloc(64, byte_len, MALLOC_CAP_DMA);
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@ -1644,6 +1644,7 @@ static void test_master_hd_no_dma(void)
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uint32_t test_trans_len = SOC_SPI_MAXIMUM_BUFFER_SIZE;
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unity_wait_for_signal("Slave ready");
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TEST_ESP_OK(essl_spi_rddma(dev0, master_receive, test_trans_len, -1, 0));
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unity_wait_for_signal("Slave ready");
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TEST_ESP_OK(essl_spi_wrdma(dev0, master_send, test_trans_len, -1, 0));
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ESP_LOG_BUFFER_HEX("master tx", master_send, test_trans_len);
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@ -1691,11 +1692,12 @@ static void test_slave_hd_no_dma(void)
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.len = test_trans_len,
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.flags = SPI_SLAVE_HD_TRANS_DMA_BUFFER_ALIGN_AUTO,
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};
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unity_send_signal("Slave ready");
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TEST_ESP_OK(spi_slave_hd_queue_trans(TEST_SPI_HOST, SPI_SLAVE_CHAN_TX, &slave_trans, portMAX_DELAY));
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unity_send_signal("Slave ready");
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TEST_ESP_OK(spi_slave_hd_get_trans_res(TEST_SPI_HOST, SPI_SLAVE_CHAN_TX, &ret_trans, portMAX_DELAY));
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slave_trans.data = slave_receive;
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TEST_ESP_OK(spi_slave_hd_queue_trans(TEST_SPI_HOST, SPI_SLAVE_CHAN_RX, &slave_trans, portMAX_DELAY));
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TEST_ESP_OK(spi_slave_hd_get_trans_res(TEST_SPI_HOST, SPI_SLAVE_CHAN_TX, &ret_trans, portMAX_DELAY));
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unity_send_signal("Slave ready");
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TEST_ESP_OK(spi_slave_hd_get_trans_res(TEST_SPI_HOST, SPI_SLAVE_CHAN_RX, &ret_trans, portMAX_DELAY));
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ESP_LOG_BUFFER_HEX("slave tx", slave_send, test_trans_len);
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@ -100,11 +100,10 @@ void app_main(void)
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ret = spi_slave_initialize(RCV_HOST, &buscfg, &slvcfg, SPI_DMA_CH_AUTO);
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assert(ret == ESP_OK);
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WORD_ALIGNED_ATTR char sendbuf[129] = "";
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WORD_ALIGNED_ATTR char recvbuf[129] = "";
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memset(recvbuf, 0, 33);
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spi_slave_transaction_t t;
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memset(&t, 0, sizeof(t));
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char *sendbuf = spi_bus_dma_memory_alloc(RCV_HOST, 129, 0);
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char *recvbuf = spi_bus_dma_memory_alloc(RCV_HOST, 129, 0);
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assert(sendbuf && recvbuf);
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spi_slave_transaction_t t = {0};
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while (1) {
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//Clear receive buffer, set send buffer to something sane
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@ -24,7 +24,7 @@
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#define GPIO_CS 10
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#define HOST_ID SPI2_HOST
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#define TRANSACTION_LEN 16
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#define TRANSACTION_LEN 64
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//The SPI transaction cycles in this example. You may change the cycle. e.g., use the ``sender`` and change it to a infinite loop
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#define EXAMPLE_CYCLES 10
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@ -25,7 +25,7 @@
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#define HOST_ID SPI2_HOST
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#define QUEUE_SIZE 6
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#define TRANSACTION_LEN 16
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#define TRANSACTION_LEN 64
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#define SYNC_REG_FROM_HOST (14 * 4)
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#define SYNC_REG_TO_HOST (15 * 4)
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@ -72,7 +72,7 @@ static esp_err_t create_transaction_pool(uint8_t **data_buf, trans_link_t *trans
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{
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for (int i = 0; i < times; i++) {
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//malloc data buffers for transaction
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data_buf[i] = heap_caps_calloc(1, TRANSACTION_LEN, MALLOC_CAP_DMA);
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data_buf[i] = spi_bus_dma_memory_alloc(HOST_ID, TRANSACTION_LEN, 0);
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if (!data_buf[i]) {
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ESP_LOGI("Create pool:", "No enough memory");
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return ESP_ERR_NO_MEM;
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@ -198,7 +198,9 @@ void sender(void *arg)
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data_ready = get_tx_data(send_buf[descriptor_id], send_buf_size, &ready_data_size);
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if (data_ready) {
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slave_trans[descriptor_id].data = send_buf[descriptor_id];
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slave_trans[descriptor_id].len = ready_data_size;
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slave_trans[descriptor_id].len = send_buf_size;
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//To use dma, data buffer address and trans_len should byte align to hardware requirement, or using following flag for auto deal by driver.
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slave_trans[descriptor_id].flags |= SPI_SLAVE_HD_TRANS_DMA_BUFFER_ALIGN_AUTO;
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//Due to the `queue_sent_cnt` and `queue_recv_cnt` logic above, we are sure there is space to send data, this will return ESP_OK immediately
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ESP_ERROR_CHECK(spi_slave_hd_queue_trans(SLAVE_HOST, SPI_SLAVE_CHAN_TX, &slave_trans[descriptor_id], portMAX_DELAY));
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descriptor_id = (descriptor_id + 1) % QUEUE_SIZE; //descriptor_id will be: 0, 1, 2, ..., QUEUE_SIZE, 0, 1, ....
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@ -234,7 +236,7 @@ void receiver(void *arg)
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uint8_t *recv_buf[QUEUE_SIZE];
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spi_slave_hd_data_t slave_trans[QUEUE_SIZE];
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for (int i = 0; i < QUEUE_SIZE; i++) {
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recv_buf[i] = heap_caps_calloc(1, recv_buf_size, MALLOC_CAP_DMA);
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recv_buf[i] = spi_bus_dma_memory_alloc(SLAVE_HOST, recv_buf_size, MALLOC_CAP_8BIT);
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if (!recv_buf[i]) {
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ESP_LOGE(TAG, "No enough memory!");
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abort();
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@ -249,6 +251,7 @@ void receiver(void *arg)
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for (int i = 0; i < QUEUE_SIZE; i++) {
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slave_trans[descriptor_id].data = recv_buf[descriptor_id];
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slave_trans[descriptor_id].len = recv_buf_size;
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slave_trans[descriptor_id].flags |= SPI_SLAVE_HD_TRANS_DMA_BUFFER_ALIGN_AUTO;
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ESP_ERROR_CHECK(spi_slave_hd_queue_trans(SLAVE_HOST, SPI_SLAVE_CHAN_RX, &slave_trans[descriptor_id], portMAX_DELAY));
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descriptor_id = (descriptor_id + 1) % QUEUE_SIZE; //descriptor_id will be: 0, 1, 2, ..., QUEUE_SIZE, 0, 1, ....
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}
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@ -266,7 +269,6 @@ void receiver(void *arg)
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*/
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ESP_ERROR_CHECK(spi_slave_hd_get_trans_res(SLAVE_HOST, SPI_SLAVE_CHAN_RX, &ret_trans, portMAX_DELAY));
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//Process the received data in your own code. Here we just print it out.
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printf("%d bytes are received: \n%s\n", ret_trans->trans_len, ret_trans->data);
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memset(ret_trans->data, 0x0, recv_buf_size);
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/**
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@ -288,10 +290,10 @@ void app_main(void)
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uint8_t init_value[SOC_SPI_MAXIMUM_BUFFER_SIZE] = {0x0};
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spi_slave_hd_write_buffer(SLAVE_HOST, 0, init_value, SOC_SPI_MAXIMUM_BUFFER_SIZE);
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static uint32_t send_buf_size = 5000;
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static uint32_t send_buf_size = 4800;
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spi_slave_hd_write_buffer(SLAVE_HOST, SLAVE_MAX_TX_BUF_LEN_REG, (uint8_t *)&send_buf_size, sizeof(send_buf_size));
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static uint32_t recv_buf_size = 120;
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static uint32_t recv_buf_size = 128;
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spi_slave_hd_write_buffer(SLAVE_HOST, SLAVE_MAX_RX_BUF_LEN_REG, (uint8_t *)&recv_buf_size, sizeof(recv_buf_size));
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uint32_t slave_ready_flag = SLAVE_READY_FLAG;
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