From b4f59dae9c35de064ce0e9e17c0d0b53f5930a55 Mon Sep 17 00:00:00 2001 From: Sudeep Mohanty Date: Fri, 28 Feb 2025 10:27:52 +0100 Subject: [PATCH] fix(lp_uart): Update the lp_core_uart_tx_flush() API to wait for Tx idle This commit updates the lp_core_uart_tx_flush() API to wait for the Tx line to become idle, therefore confirming that all bytes are sent out. Closes https://github.com/espressif/esp-idf/issues/15433 --- components/ulp/lp_core/lp_core/lp_core_uart.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/components/ulp/lp_core/lp_core/lp_core_uart.c b/components/ulp/lp_core/lp_core/lp_core_uart.c index f1a3bdae29..f1163fba79 100644 --- a/components/ulp/lp_core/lp_core/lp_core_uart.c +++ b/components/ulp/lp_core/lp_core/lp_core_uart.c @@ -68,9 +68,9 @@ void lp_core_uart_tx_flush(uart_port_t lp_uart_num) (void)lp_uart_num; int loop_cnt = 0; - if (uart_ll_is_enabled(LP_UART_NUM_0) && !uart_hal_is_tx_idle(&hal)) { + if (uart_ll_is_enabled(LP_UART_NUM_0)) { /* Wait for the Tx FIFO to be empty */ - while (!(uart_hal_get_intraw_mask(&hal) & (LP_UART_TX_INT_FLAG | LP_UART_ERR_INT_FLAG))) { + while (!(uart_hal_get_intraw_mask(&hal) & (LP_UART_TX_INT_FLAG | LP_UART_ERR_INT_FLAG) && uart_hal_is_tx_idle(&hal))) { loop_cnt++; if (loop_cnt > 10000) { /* Bail out */