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https://github.com/espressif/esp-idf
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test(mspi): test 120m sdr flash 200m ddr psram on esp32p4
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@ -20,7 +20,7 @@ components/esp_hw_support/test_apps/host_test_linux:
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components/esp_hw_support/test_apps/mspi:
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disable:
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- if: IDF_TARGET != "esp32s3"
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- if: IDF_TARGET not in ["esp32s3", "esp32p4"]
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components/esp_hw_support/test_apps/mspi_psram_with_dfs:
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disable:
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@ -1,5 +1,5 @@
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| Supported Targets | ESP32-S3 |
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| ----------------- | -------- |
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| Supported Targets | ESP32-P4 | ESP32-S3 |
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| ----------------- | -------- | -------- |
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This project tests if Flash and PSRAM can work under different configurations.
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To add new configuration, create one more sdkconfig.ci.NAME file in this directory.
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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@ -22,9 +22,15 @@ static void sorted_array_insert(uint32_t *array, uint32_t *size, uint32_t item)
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(*size)++;
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}
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#if CONFIG_IDF_TARGET_ESP32S3
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#define TEST_TIME_CNT 10
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#define TEST_TIME_LIMIT_US 10
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TEST_CASE("MSPI: Test mspi timing turning time cost", "[mspi]")
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#elif CONFIG_IDF_TARGET_ESP32P4
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#define TEST_TIME_CNT 30
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#define TEST_TIME_LIMIT_US 30
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#endif
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TEST_CASE("MSPI: Test mspi timing tuning time cost", "[mspi]")
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{
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uint64_t start, end;
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uint32_t cost, index_1 = 0, index_2 = 0;
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@ -1,13 +1,12 @@
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# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: CC0-1.0
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import os
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import pathlib
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import pytest
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from pytest_embedded_idf import IdfDut
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MSPI_F8R8_configs = [p.name.replace('sdkconfig.ci.', '') for p in pathlib.Path(os.path.dirname(__file__)).glob('sdkconfig.ci.f8r8*')]
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MSPI_F8R8_configs = [p.name.replace('sdkconfig.ci.', '') for p in pathlib.Path(os.path.dirname(__file__)).glob('sdkconfig.ci.esp32s3_f8r8*')]
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@pytest.mark.esp32s3
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@ -18,7 +17,7 @@ def test_flash8_psram8(dut: IdfDut) -> None:
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# For F4R8 board (Quad Flash and Octal PSRAM)
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MSPI_F4R8_configs = [p.name.replace('sdkconfig.ci.', '') for p in pathlib.Path(os.path.dirname(__file__)).glob('sdkconfig.ci.f4r8*')]
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MSPI_F4R8_configs = [p.name.replace('sdkconfig.ci.', '') for p in pathlib.Path(os.path.dirname(__file__)).glob('sdkconfig.ci.esp32s3_f4r8*')]
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@pytest.mark.esp32s3
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@ -29,7 +28,7 @@ def test_flash4_psram8(dut: IdfDut) -> None:
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# For F4R4 board (Quad Flash and Quad PSRAM)
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MSPI_F4R4_configs = [p.name.replace('sdkconfig.ci.', '') for p in pathlib.Path(os.path.dirname(__file__)).glob('sdkconfig.ci.f4r4*')]
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MSPI_F4R4_configs = [p.name.replace('sdkconfig.ci.', '') for p in pathlib.Path(os.path.dirname(__file__)).glob('sdkconfig.ci.esp32s3_f4r4*')]
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@pytest.mark.esp32s3
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@ -37,3 +36,16 @@ MSPI_F4R4_configs = [p.name.replace('sdkconfig.ci.', '') for p in pathlib.Path(o
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@pytest.mark.parametrize('config', MSPI_F4R4_configs, indirect=True)
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def test_flash4_psram4(dut: IdfDut) -> None:
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dut.run_all_single_board_cases()
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@pytest.mark.esp32p4
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@pytest.mark.generic
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@pytest.mark.parametrize(
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'config',
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[
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'esp32p4_120sdr_200ddr',
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],
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indirect=True,
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)
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def test_flash_psram_esp32p4(dut: IdfDut) -> None:
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dut.run_all_single_board_cases()
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@ -0,0 +1,8 @@
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CONFIG_IDF_TARGET="esp32p4"
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CONFIG_IDF_EXPERIMENTAL_FEATURES=y
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_SPEED_200M=y
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CONFIG_ESPTOOLPY_FLASHFREQ_120M=y
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CONFIG_SPI_FLASH_HPM_ENA=y
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CONFIG_BOOTLOADER_FLASH_DC_AWARE=y
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@ -1,5 +1,7 @@
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# Legacy, F4R4, Flash 120M SDR, PSRAM disable
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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@ -1,5 +1,7 @@
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# Legacy, F4R4, Flash 120M SDR, PSRAM 120M SDR
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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@ -1,5 +1,7 @@
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# Legacy, F4R4, Flash 120M SDR, PSRAM 40M SDR
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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@ -1,5 +1,7 @@
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# Legacy, F4R4, Flash 120M SDR, PSRAM disable, compiler -Os and silent
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
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@ -1,5 +1,7 @@
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# Legacy, F4R4, Flash 40M SDR, PSRAM 120M SDR
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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@ -1,5 +1,7 @@
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# Legacy, F4R4, Flash 80M SDR, PSRAM 80M SDR
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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@ -1,5 +1,7 @@
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# Legacy, F4R8, Flash 120M SDR, PSRAM disable
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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# Legacy, F4R8, Flash 80M SDR, PSRAM 40M DDR
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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# Legacy, F4R8, Flash 80M SDR, PSRAM 80M DDR
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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# Legacy, F8R8, Flash 120M SDR, PSRAM disable
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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# Legacy, F8R8, Flash 40M DDR, PSRAM 40M DDR
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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# Legacy, F8R8, Flash 40M DDR, PSRAM 80M DDR
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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# Legacy, F8R8, Flash 80M DDR, PSRAM 40M DDR
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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# Legacy, F8R8, Flash 80M DDR, PSRAM 80M DDR
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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# Legacy, F8R8, Flash 80M DDR, PSRAM 80M DDR
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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# Legacy, F8R8, Flash 80M SDR, PSRAM 80M DDR
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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