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ci(sd): disable esp32 sd emmc tests
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@ -34,7 +34,7 @@
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// Currently, no runners for S3 and C2
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#define WITH_SDSPI_TEST (!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C2))
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// Can't test eMMC (slot 0) and PSRAM together
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#define WITH_EMMC_TEST (SOC_SDMMC_HOST_SUPPORTED && !CONFIG_SPIRAM && !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3))
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#define WITH_EMMC_TEST (SOC_SDMMC_HOST_SUPPORTED && !CONFIG_SPIRAM && !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3) && !TEMPORARY_DISABLED_FOR_TARGETS(ESP32))
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/* power supply enable pin */
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#define SD_TEST_BOARD_VSEL_EN_GPIO 27
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