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https://github.com/espressif/esp-idf
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refactor(esp_tee): Remove explicit setting of the HP_CPU
APM/TEE security mode
This commit is contained in:
parent
26fa7109f3
commit
5c4a527750
@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@ -15,21 +15,12 @@
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.global _sec_world_entry
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.global _sec_world_entry
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.type _sec_world_entry, @function
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.type _sec_world_entry, @function
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_sec_world_entry:
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_sec_world_entry:
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/* Setup the APM for HP CPU in TEE mode */
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li t0, TEE_M0_MODE_CTRL_REG
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sw zero, 0(t0) /* APM_LL_SECURE_MODE_TEE = 0 */
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/* Disable the U-mode delegation of all interrupts */
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/* Disable the U-mode delegation of all interrupts */
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csrwi mideleg, 0
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csrwi mideleg, 0
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/* Jump to the secure service dispatcher */
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/* Jump to the secure service dispatcher */
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jal esp_tee_service_dispatcher
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jal esp_tee_service_dispatcher
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/* Setup the APM for HP CPU in REE mode */
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li t0, TEE_M0_MODE_CTRL_REG
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li t1, 0x1 /* APM_LL_SECURE_MODE_REE = 1 */
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sw t1, 0(t0)
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/* Enable the U-mode delegation of all interrupts (except the TEE secure interrupt) */
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/* Enable the U-mode delegation of all interrupts (except the TEE secure interrupt) */
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li t0, 0xffffbfff
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li t0, 0xffffbfff
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csrw mideleg, t0
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csrw mideleg, t0
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@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@ -177,15 +177,16 @@ _panic_handler:
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addi sp, sp, -16
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addi sp, sp, -16
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sw t0, 0(sp)
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sw t0, 0(sp)
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/* Check whether the exception is an M-mode ecall */
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/* Read mcause */
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csrr t0, mcause
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csrr t0, mcause
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xori t0, t0, ECALL_M_MODE
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beqz t0, _machine_ecall
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/* Check whether the exception is an M-mode ecall */
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li t1, ECALL_M_MODE
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beq t0, t1, _machine_ecall
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/* Check whether the exception is an U-mode ecall */
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/* Check whether the exception is an U-mode ecall */
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csrr t0, mcause
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li t1, ECALL_U_MODE
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xori t0, t0, ECALL_U_MODE
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beq t0, t1, _user_ecall
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beqz t0, _user_ecall
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/* Restore t0 from the stack */
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/* Restore t0 from the stack */
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lw t0, 0(sp)
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lw t0, 0(sp)
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@ -250,6 +251,10 @@ _return_from_exception:
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_ecall_handler:
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_ecall_handler:
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/* M-mode ecall handler */
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/* M-mode ecall handler */
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_machine_ecall:
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_machine_ecall:
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/* Set the privilege mode to transition to after mret to U-mode */
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li t0, MSTATUS_MPP
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csrc mstatus, t0
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/* Check whether this is the first M-mode ecall (see esp_tee_init) and skip context restoration */
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/* Check whether this is the first M-mode ecall (see esp_tee_init) and skip context restoration */
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lui t0, ESP_TEE_M2U_SWITCH_MAGIC
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lui t0, ESP_TEE_M2U_SWITCH_MAGIC
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beq a1, t0, _skip_ctx_restore
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beq a1, t0, _skip_ctx_restore
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@ -267,15 +272,10 @@ _machine_ecall:
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restore_general_regs RV_STK_FRMSZ
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restore_general_regs RV_STK_FRMSZ
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csrrw a0, mscratch, zero
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csrrw a0, mscratch, zero
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/* This point is reached only after the first M-mode ecall, never again (see esp_tee_init) */
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_skip_ctx_restore:
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_skip_ctx_restore:
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/* Copy the ra register to mepc which contains the user app entry point (i.e. call_start_cpu0) */
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/* Copy the ra register to mepc which contains the user app entry point (i.e. call_start_cpu0) */
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csrw mepc, ra
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csrw mepc, ra
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/* Set the privilege mode to transition to after mret to U-mode */
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li t3, MSTATUS_MPP
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csrc mstatus, t3
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/* Jump to the REE */
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/* Jump to the REE */
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mret
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mret
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@ -291,8 +291,8 @@ _user_ecall:
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lw t0, 0(sp)
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lw t0, 0(sp)
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addi sp, sp, 16
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addi sp, sp, 16
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/* This point is reached after a secure service call is issued from the REE */
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/* This point is reached when a service call is issued from the REE */
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/* Save register context and the mepc */
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/* Save register context and mepc */
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save_general_regs RV_STK_FRMSZ
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save_general_regs RV_STK_FRMSZ
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save_mepc
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save_mepc
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@ -100,9 +100,6 @@ void esp_tee_soc_secure_sys_init(void)
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IRAM_ATTR inline void esp_tee_switch_to_ree(uint32_t ree_entry_addr)
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IRAM_ATTR inline void esp_tee_switch_to_ree(uint32_t ree_entry_addr)
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{
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{
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/* Switch HP_CPU to REE0 mode. */
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apm_tee_hal_set_master_secure_mode(HP_APM_CTRL, APM_LL_MASTER_HPCORE, APM_LL_SECURE_MODE_REE0);
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/* 2nd argument is used as magic value to detect very first M2U switch */
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/* 2nd argument is used as magic value to detect very first M2U switch */
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/* TBD: clean this up and use proper temporary register instead of a1 */
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/* TBD: clean this up and use proper temporary register instead of a1 */
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/* Switch to non-secure world and launch App. */
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/* Switch to non-secure world and launch App. */
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