From 14b7db5dd0076ca522bcc43bebabeefe730d6920 Mon Sep 17 00:00:00 2001 From: morris Date: Thu, 2 Nov 2023 11:39:29 +0800 Subject: [PATCH] feat(rmt): support calling rmt_receive in ISR callback --- components/driver/CMakeLists.txt | 1 + components/driver/rmt/Kconfig.rmt | 9 ++++ components/driver/rmt/include/driver/rmt_rx.h | 2 + components/driver/rmt/linker.lf | 7 +++ components/driver/rmt/rmt_private.h | 2 +- components/driver/rmt/rmt_rx.c | 37 ++++++++------- components/driver/rmt/rmt_tx.c | 36 +++++++------- .../driver/test_apps/rmt/main/test_rmt_iram.c | 47 ++++++++++++------- .../test_apps/rmt/sdkconfig.ci.iram_safe | 1 + components/hal/esp32/include/hal/rmt_ll.h | 3 ++ components/hal/esp32c3/include/hal/rmt_ll.h | 4 ++ components/hal/esp32c6/include/hal/rmt_ll.h | 4 ++ components/hal/esp32h2/include/hal/rmt_ll.h | 4 ++ components/hal/esp32p4/include/hal/rmt_ll.h | 4 ++ components/hal/esp32s2/include/hal/rmt_ll.h | 5 +- components/hal/esp32s3/include/hal/rmt_ll.h | 4 ++ docs/en/api-reference/peripherals/rmt.rst | 9 +++- docs/zh_CN/api-reference/peripherals/rmt.rst | 7 +++ 18 files changed, 130 insertions(+), 56 deletions(-) create mode 100644 components/driver/rmt/linker.lf diff --git a/components/driver/CMakeLists.txt b/components/driver/CMakeLists.txt index d263857117..e31984ae33 100644 --- a/components/driver/CMakeLists.txt +++ b/components/driver/CMakeLists.txt @@ -164,6 +164,7 @@ if(CONFIG_SOC_RMT_SUPPORTED) "rmt/rmt_rx.c" "rmt/rmt_tx.c" "deprecated/rmt_legacy.c") + list(APPEND ldfragments "rmt/linker.lf") endif() # SDIO Slave related source files diff --git a/components/driver/rmt/Kconfig.rmt b/components/driver/rmt/Kconfig.rmt index 76605b7575..97ea9c02b4 100644 --- a/components/driver/rmt/Kconfig.rmt +++ b/components/driver/rmt/Kconfig.rmt @@ -9,6 +9,15 @@ menu "RMT Configuration" Ensure the RMT interrupt is IRAM-Safe by allowing the interrupt handler to be executable when the cache is disabled (e.g. SPI Flash write). + config RMT_RECV_FUNC_IN_IRAM + bool "Place RMT receive function into IRAM" + default n + select GDMA_CTRL_FUNC_IN_IRAM if SOC_RMT_SUPPORT_DMA # RMT needs to start the GDMA in the receive function + help + Place RMT receive function into IRAM, + so that the receive function can be IRAM-safe and able to be called when the flash cache is disabled. + Enabling this option can improve driver performance as well. + config RMT_SUPPRESS_DEPRECATE_WARN bool "Suppress legacy driver deprecated warning" default n diff --git a/components/driver/rmt/include/driver/rmt_rx.h b/components/driver/rmt/include/driver/rmt_rx.h index 13eebcd1b0..325a755560 100644 --- a/components/driver/rmt/include/driver/rmt_rx.h +++ b/components/driver/rmt/include/driver/rmt_rx.h @@ -72,6 +72,8 @@ esp_err_t rmt_new_rx_channel(const rmt_rx_channel_config_t *config, rmt_channel_ * * @note This function is non-blocking, it initiates a new receive job and then returns. * User should check the received data from the `on_recv_done` callback that registered by `rmt_rx_register_event_callbacks()`. + * @note This function can also be called in ISR context. + * @note If you want this function to work even when the flash cache is disabled, please enable the `CONFIG_RMT_RECV_FUNC_IN_IRAM` option. * * @param[in] rx_channel RMT RX channel that created by `rmt_new_rx_channel()` * @param[in] buffer The buffer to store the received RMT symbols diff --git a/components/driver/rmt/linker.lf b/components/driver/rmt/linker.lf new file mode 100644 index 0000000000..508fc84c21 --- /dev/null +++ b/components/driver/rmt/linker.lf @@ -0,0 +1,7 @@ +[mapping:rmt_driver] +archive: libdriver.a +entries: + if RMT_RECV_FUNC_IN_IRAM = y: + rmt_rx: rmt_receive (noflash) + if SOC_RMT_SUPPORT_DMA = y: + rmt_rx: rmt_rx_mount_dma_buffer (noflash) diff --git a/components/driver/rmt/rmt_private.h b/components/driver/rmt/rmt_private.h index ac1e4bbd22..ac9e38e4ea 100644 --- a/components/driver/rmt/rmt_private.h +++ b/components/driver/rmt/rmt_private.h @@ -30,7 +30,7 @@ extern "C" { #endif -#if CONFIG_RMT_ISR_IRAM_SAFE +#if CONFIG_RMT_ISR_IRAM_SAFE || CONFIG_RMT_RECV_FUNC_IN_IRAM #define RMT_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT) #else #define RMT_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT diff --git a/components/driver/rmt/rmt_rx.c b/components/driver/rmt/rmt_rx.c index 742b23d2d9..a0c259345d 100644 --- a/components/driver/rmt/rmt_rx.c +++ b/components/driver/rmt/rmt_rx.c @@ -344,22 +344,22 @@ esp_err_t rmt_rx_register_event_callbacks(rmt_channel_handle_t channel, const rm esp_err_t rmt_receive(rmt_channel_handle_t channel, void *buffer, size_t buffer_size, const rmt_receive_config_t *config) { - ESP_RETURN_ON_FALSE(channel && buffer && buffer_size && config, ESP_ERR_INVALID_ARG, TAG, "invalid argument"); - ESP_RETURN_ON_FALSE(channel->direction == RMT_CHANNEL_DIRECTION_RX, ESP_ERR_INVALID_ARG, TAG, "invalid channel direction"); + ESP_RETURN_ON_FALSE_ISR(channel && buffer && buffer_size && config, ESP_ERR_INVALID_ARG, TAG, "invalid argument"); + ESP_RETURN_ON_FALSE_ISR(channel->direction == RMT_CHANNEL_DIRECTION_RX, ESP_ERR_INVALID_ARG, TAG, "invalid channel direction"); rmt_rx_channel_t *rx_chan = __containerof(channel, rmt_rx_channel_t, base); if (channel->dma_chan) { - ESP_RETURN_ON_FALSE(esp_ptr_internal(buffer), ESP_ERR_INVALID_ARG, TAG, "buffer must locate in internal RAM for DMA use"); + ESP_RETURN_ON_FALSE_ISR(esp_ptr_internal(buffer), ESP_ERR_INVALID_ARG, TAG, "buffer must locate in internal RAM for DMA use"); #if CONFIG_IDF_TARGET_ESP32P4 uint32_t data_cache_line_mask = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA) - 1; - ESP_RETURN_ON_FALSE(((uintptr_t)buffer & data_cache_line_mask) == 0, ESP_ERR_INVALID_ARG, TAG, "buffer must be aligned to cache line size"); - ESP_RETURN_ON_FALSE((buffer_size & data_cache_line_mask) == 0, ESP_ERR_INVALID_ARG, TAG, "buffer size must be aligned to cache line size"); + ESP_RETURN_ON_FALSE_ISR(((uintptr_t)buffer & data_cache_line_mask) == 0, ESP_ERR_INVALID_ARG, TAG, "buffer must be aligned to cache line size"); + ESP_RETURN_ON_FALSE_ISR((buffer_size & data_cache_line_mask) == 0, ESP_ERR_INVALID_ARG, TAG, "buffer size must be aligned to cache line size"); #endif } if (channel->dma_chan) { - ESP_RETURN_ON_FALSE(buffer_size <= rx_chan->num_dma_nodes * RMT_DMA_DESC_BUF_MAX_SIZE, - ESP_ERR_INVALID_ARG, TAG, "buffer size exceeds DMA capacity"); + ESP_RETURN_ON_FALSE_ISR(buffer_size <= rx_chan->num_dma_nodes * RMT_DMA_DESC_BUF_MAX_SIZE, + ESP_ERR_INVALID_ARG, TAG, "buffer size exceeds DMA capacity"); } rmt_group_t *group = channel->group; rmt_hal_context_t *hal = &group->hal; @@ -367,13 +367,13 @@ esp_err_t rmt_receive(rmt_channel_handle_t channel, void *buffer, size_t buffer_ uint32_t filter_reg_value = ((uint64_t)group->resolution_hz * config->signal_range_min_ns) / 1000000000UL; uint32_t idle_reg_value = ((uint64_t)channel->resolution_hz * config->signal_range_max_ns) / 1000000000UL; - ESP_RETURN_ON_FALSE(filter_reg_value <= RMT_LL_MAX_FILTER_VALUE, ESP_ERR_INVALID_ARG, TAG, "signal_range_min_ns too big"); - ESP_RETURN_ON_FALSE(idle_reg_value <= RMT_LL_MAX_IDLE_VALUE, ESP_ERR_INVALID_ARG, TAG, "signal_range_max_ns too big"); + ESP_RETURN_ON_FALSE_ISR(filter_reg_value <= RMT_LL_MAX_FILTER_VALUE, ESP_ERR_INVALID_ARG, TAG, "signal_range_min_ns too big"); + ESP_RETURN_ON_FALSE_ISR(idle_reg_value <= RMT_LL_MAX_IDLE_VALUE, ESP_ERR_INVALID_ARG, TAG, "signal_range_max_ns too big"); // check if we're in a proper state to start the receiver rmt_fsm_t expected_fsm = RMT_FSM_ENABLE; - ESP_RETURN_ON_FALSE(atomic_compare_exchange_strong(&channel->fsm, &expected_fsm, RMT_FSM_RUN_WAIT), - ESP_ERR_INVALID_STATE, TAG, "channel not in enable state"); + ESP_RETURN_ON_FALSE_ISR(atomic_compare_exchange_strong(&channel->fsm, &expected_fsm, RMT_FSM_RUN_WAIT), + ESP_ERR_INVALID_STATE, TAG, "channel not in enable state"); // fill in the transaction descriptor rmt_rx_trans_desc_t *t = &rx_chan->trans_desc; @@ -391,7 +391,7 @@ esp_err_t rmt_receive(rmt_channel_handle_t channel, void *buffer, size_t buffer_ } rx_chan->mem_off = 0; - portENTER_CRITICAL(&channel->spinlock); + portENTER_CRITICAL_SAFE(&channel->spinlock); // reset memory writer offset rmt_ll_rx_reset_pointer(hal->regs, channel_id); rmt_ll_rx_set_mem_owner(hal->regs, channel_id, RMT_LL_MEM_OWNER_HW); @@ -401,7 +401,7 @@ esp_err_t rmt_receive(rmt_channel_handle_t channel, void *buffer, size_t buffer_ rmt_ll_rx_set_idle_thres(hal->regs, channel_id, idle_reg_value); // turn on RMT RX machine rmt_ll_rx_enable(hal->regs, channel_id, true); - portEXIT_CRITICAL(&channel->spinlock); + portEXIT_CRITICAL_SAFE(&channel->spinlock); // saying we're in running state, this state will last until the receiving is done // i.e., we will switch back to the enable state in the receive done interrupt handler @@ -585,6 +585,9 @@ static bool IRAM_ATTR rmt_isr_handle_rx_done(rmt_rx_channel_t *rx_chan) } trans_desc->copy_dest_off += copy_size; trans_desc->received_symbol_num += copy_size / sizeof(rmt_symbol_word_t); + // switch back to the enable state, then user can call `rmt_receive` to start a new receive + atomic_store(&channel->fsm, RMT_FSM_ENABLE); + // notify the user with receive RMT symbols if (rx_chan->on_recv_done) { rmt_rx_done_event_data_t edata = { @@ -595,8 +598,6 @@ static bool IRAM_ATTR rmt_isr_handle_rx_done(rmt_rx_channel_t *rx_chan) need_yield = true; } } - // switch back to the enable state, then user can call `rmt_receive` to start a new receive - atomic_store(&channel->fsm, RMT_FSM_ENABLE); return need_yield; } @@ -699,6 +700,9 @@ static bool IRAM_ATTR rmt_dma_rx_eof_cb(gdma_channel_handle_t dma_chan, gdma_eve Cache_Invalidate_Addr(invalidate_map, (uint32_t)trans_desc->buffer, trans_desc->buffer_size); #endif + // switch back to the enable state, then user can call `rmt_receive` to start a new receive + atomic_store(&channel->fsm, RMT_FSM_ENABLE); + if (rx_chan->on_recv_done) { rmt_rx_done_event_data_t edata = { .received_symbols = trans_desc->buffer, @@ -708,8 +712,7 @@ static bool IRAM_ATTR rmt_dma_rx_eof_cb(gdma_channel_handle_t dma_chan, gdma_eve need_yield = true; } } - // switch back to the enable state, then user can call `rmt_receive` to start a new receive - atomic_store(&channel->fsm, RMT_FSM_ENABLE); + return need_yield; } #endif // SOC_RMT_SUPPORT_DMA diff --git a/components/driver/rmt/rmt_tx.c b/components/driver/rmt/rmt_tx.c index 95188e8daa..3cb25a395f 100644 --- a/components/driver/rmt/rmt_tx.c +++ b/components/driver/rmt/rmt_tx.c @@ -893,16 +893,16 @@ static bool IRAM_ATTR rmt_isr_handle_tx_done(rmt_tx_channel_t *tx_chan) } tx_chan->cur_trans = NULL; atomic_store(&channel->fsm, RMT_FSM_ENABLE); - } - // invoke callback - rmt_tx_done_callback_t done_cb = tx_chan->on_trans_done; - if (done_cb) { - rmt_tx_done_event_data_t edata = { - .num_symbols = trans_desc->transmitted_symbol_num, - }; - if (done_cb(channel, &edata, tx_chan->user_data)) { - need_yield = true; + // invoke callback + rmt_tx_done_callback_t done_cb = tx_chan->on_trans_done; + if (done_cb) { + rmt_tx_done_event_data_t edata = { + .num_symbols = trans_desc->transmitted_symbol_num, + }; + if (done_cb(channel, &edata, tx_chan->user_data)) { + need_yield = true; + } } } @@ -970,16 +970,16 @@ static bool IRAM_ATTR rmt_isr_handle_tx_loop_end(rmt_tx_channel_t *tx_chan) } tx_chan->cur_trans = NULL; atomic_store(&channel->fsm, RMT_FSM_ENABLE); - } - // invoke callback - rmt_tx_done_callback_t done_cb = tx_chan->on_trans_done; - if (done_cb) { - rmt_tx_done_event_data_t edata = { - .num_symbols = trans_desc->transmitted_symbol_num, - }; - if (done_cb(channel, &edata, tx_chan->user_data)) { - need_yield = true; + // invoke callback + rmt_tx_done_callback_t done_cb = tx_chan->on_trans_done; + if (done_cb) { + rmt_tx_done_event_data_t edata = { + .num_symbols = trans_desc->transmitted_symbol_num, + }; + if (done_cb(channel, &edata, tx_chan->user_data)) { + need_yield = true; + } } } diff --git a/components/driver/test_apps/rmt/main/test_rmt_iram.c b/components/driver/test_apps/rmt/main/test_rmt_iram.c index f772de8beb..32eac62329 100644 --- a/components/driver/test_apps/rmt/main/test_rmt_iram.c +++ b/components/driver/test_apps/rmt/main/test_rmt_iram.c @@ -87,21 +87,27 @@ TEST_CASE("rmt tx iram safe", "[rmt]") #endif } +#define TEST_RMT_SYMBOLS 2 + static void IRAM_ATTR test_simulate_input_post_cache_disable(void *args) { int gpio_num = (int)args; - // simulate input signal, should only be recognized as one RMT symbol - gpio_set_level(gpio_num, 0); - esp_rom_delay_us(50); - gpio_set_level(gpio_num, 1); - esp_rom_delay_us(50); - gpio_set_level(gpio_num, 0); - esp_rom_delay_us(20000); + // simulate input signal, should only be recognized as two RMT symbols + for (int i = 0; i < TEST_RMT_SYMBOLS; i++) { + gpio_set_level(gpio_num, 0); + esp_rom_delay_us(50); + gpio_set_level(gpio_num, 1); + esp_rom_delay_us(50); + gpio_set_level(gpio_num, 0); + esp_rom_delay_us(20000); + } } typedef struct { TaskHandle_t task_to_notify; size_t received_symbol_num; + rmt_receive_config_t rx_config; + rmt_symbol_word_t remote_codes[128]; } test_nec_rx_user_data_t; IRAM_ATTR @@ -109,8 +115,15 @@ static bool test_rmt_rx_done_callback(rmt_channel_handle_t channel, const rmt_rx { BaseType_t high_task_wakeup = pdFALSE; test_nec_rx_user_data_t *test_user_data = (test_nec_rx_user_data_t *)user_data; - test_user_data->received_symbol_num = edata->num_symbols; - vTaskNotifyGiveFromISR(test_user_data->task_to_notify, &high_task_wakeup); + test_user_data->received_symbol_num += edata->num_symbols; + // should receive one RMT symbol at a time + if (edata->num_symbols == 1) { + if (test_user_data->received_symbol_num == TEST_RMT_SYMBOLS) { + vTaskNotifyGiveFromISR(test_user_data->task_to_notify, &high_task_wakeup); + } else { + rmt_receive(channel, test_user_data->remote_codes, sizeof(test_user_data->remote_codes), &test_user_data->rx_config); + } + } return high_task_wakeup == pdTRUE; } @@ -137,27 +150,25 @@ static void test_rmt_rx_iram_safe(size_t mem_block_symbols, bool with_dma, rmt_c }; test_nec_rx_user_data_t test_user_data = { .task_to_notify = xTaskGetCurrentTaskHandle(), + .received_symbol_num = 0, + .rx_config = { + .signal_range_min_ns = 1250, + .signal_range_max_ns = 12000000, + }, }; TEST_ESP_OK(rmt_rx_register_event_callbacks(rx_channel, &cbs, &test_user_data)); printf("enable rx channel\r\n"); TEST_ESP_OK(rmt_enable(rx_channel)); - rmt_symbol_word_t remote_codes[128]; - - rmt_receive_config_t receive_config = { - .signal_range_min_ns = 1250, - .signal_range_max_ns = 12000000, - }; - // ready to receive - TEST_ESP_OK(rmt_receive(rx_channel, remote_codes, sizeof(remote_codes), &receive_config)); + TEST_ESP_OK(rmt_receive(rx_channel, test_user_data.remote_codes, sizeof(test_user_data.remote_codes), &test_user_data.rx_config)); // disable the flash cache, and simulate input signal by GPIO unity_utils_run_cache_disable_stub(test_simulate_input_post_cache_disable, 0); TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(1000))); - TEST_ASSERT_EQUAL(1, test_user_data.received_symbol_num); + TEST_ASSERT_EQUAL(TEST_RMT_SYMBOLS, test_user_data.received_symbol_num); printf("disable rx channels\r\n"); TEST_ESP_OK(rmt_disable(rx_channel)); diff --git a/components/driver/test_apps/rmt/sdkconfig.ci.iram_safe b/components/driver/test_apps/rmt/sdkconfig.ci.iram_safe index 7fe0bfd1e1..651fb949bc 100644 --- a/components/driver/test_apps/rmt/sdkconfig.ci.iram_safe +++ b/components/driver/test_apps/rmt/sdkconfig.ci.iram_safe @@ -1,5 +1,6 @@ CONFIG_COMPILER_DUMP_RTL_FILES=y CONFIG_RMT_ISR_IRAM_SAFE=y +CONFIG_RMT_RECV_FUNC_IN_IRAM=y CONFIG_GPIO_CTRL_FUNC_IN_IRAM=y CONFIG_COMPILER_OPTIMIZATION_NONE=y # place non-ISR FreeRTOS functions in Flash diff --git a/components/hal/esp32/include/hal/rmt_ll.h b/components/hal/esp32/include/hal/rmt_ll.h index c410ffc16f..97a9267fcd 100644 --- a/components/hal/esp32/include/hal/rmt_ll.h +++ b/components/hal/esp32/include/hal/rmt_ll.h @@ -404,6 +404,7 @@ static inline void rmt_ll_rx_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, ui * @param channel RMT RX channel number * @param thres Time length threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { HAL_FORCE_MODIFY_U32_REG_FIELD(dev->conf_ch[channel].conf0, idle_thres, thres); @@ -429,6 +430,7 @@ static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, rmt * @param channel RMT RX chanenl number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->conf_ch[channel].conf1.rx_filter_en = enable; @@ -441,6 +443,7 @@ static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, boo * @param channel RMT RX channel number * @param thres Filter threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { HAL_FORCE_MODIFY_U32_REG_FIELD(dev->conf_ch[channel].conf1, rx_filter_thres, thres); diff --git a/components/hal/esp32c3/include/hal/rmt_ll.h b/components/hal/esp32c3/include/hal/rmt_ll.h index e70a0bf435..b1d8acdc75 100644 --- a/components/hal/esp32c3/include/hal/rmt_ll.h +++ b/components/hal/esp32c3/include/hal/rmt_ll.h @@ -471,6 +471,7 @@ static inline void rmt_ll_rx_set_channel_clock_div(rmt_dev_t *dev, uint32_t chan * @param dev Peripheral instance address * @param channel RMT RX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel) { dev->rx_conf[channel].conf1.mem_wr_rst = 1; @@ -513,6 +514,7 @@ static inline void rmt_ll_rx_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, ui * @param channel RMT RX channel number * @param thres Time length threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { dev->rx_conf[channel].conf0.idle_thres = thres; @@ -538,6 +540,7 @@ static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, rmt * @param channel RMT RX chanenl number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->rx_conf[channel].conf1.rx_filter_en = enable; @@ -550,6 +553,7 @@ static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, boo * @param channel RMT RX channel number * @param thres Filter threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { HAL_FORCE_MODIFY_U32_REG_FIELD(dev->rx_conf[channel].conf1, rx_filter_thres, thres); diff --git a/components/hal/esp32c6/include/hal/rmt_ll.h b/components/hal/esp32c6/include/hal/rmt_ll.h index 9db5a5109c..f2da58d415 100644 --- a/components/hal/esp32c6/include/hal/rmt_ll.h +++ b/components/hal/esp32c6/include/hal/rmt_ll.h @@ -477,6 +477,7 @@ static inline void rmt_ll_rx_set_channel_clock_div(rmt_dev_t *dev, uint32_t chan * @param dev Peripheral instance address * @param channel RMT RX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel) { dev->chmconf[channel].conf1.mem_wr_rst_chm = 1; @@ -519,6 +520,7 @@ static inline void rmt_ll_rx_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, ui * @param channel RMT RX channel number * @param thres Time length threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { dev->chmconf[channel].conf0.idle_thres_chm = thres; @@ -544,6 +546,7 @@ static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, rmt * @param channel RMT RX chanenl number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->chmconf[channel].conf1.rx_filter_en_chm = enable; @@ -556,6 +559,7 @@ static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, boo * @param channel RMT RX channel number * @param thres Filter threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { HAL_FORCE_MODIFY_U32_REG_FIELD(dev->chmconf[channel].conf1, rx_filter_thres_chm, thres); diff --git a/components/hal/esp32h2/include/hal/rmt_ll.h b/components/hal/esp32h2/include/hal/rmt_ll.h index bc7b29ed40..707c57ef3a 100644 --- a/components/hal/esp32h2/include/hal/rmt_ll.h +++ b/components/hal/esp32h2/include/hal/rmt_ll.h @@ -474,6 +474,7 @@ static inline void rmt_ll_rx_set_channel_clock_div(rmt_dev_t *dev, uint32_t chan * @param dev Peripheral instance address * @param channel RMT RX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel) { dev->chmconf[channel].conf1.mem_wr_rst_chm = 1; @@ -516,6 +517,7 @@ static inline void rmt_ll_rx_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, ui * @param channel RMT RX channel number * @param thres Time length threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { dev->chmconf[channel].conf0.idle_thres_chm = thres; @@ -541,6 +543,7 @@ static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, rmt * @param channel RMT RX chanenl number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->chmconf[channel].conf1.rx_filter_en_chm = enable; @@ -553,6 +556,7 @@ static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, boo * @param channel RMT RX channel number * @param thres Filter threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { HAL_FORCE_MODIFY_U32_REG_FIELD(dev->chmconf[channel].conf1, rx_filter_thres_chm, thres); diff --git a/components/hal/esp32p4/include/hal/rmt_ll.h b/components/hal/esp32p4/include/hal/rmt_ll.h index 46667223f9..136dda044e 100644 --- a/components/hal/esp32p4/include/hal/rmt_ll.h +++ b/components/hal/esp32p4/include/hal/rmt_ll.h @@ -506,6 +506,7 @@ static inline void rmt_ll_rx_set_channel_clock_div(rmt_dev_t *dev, uint32_t chan * @param dev Peripheral instance address * @param channel RMT RX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel) { dev->chmconf[channel].conf1.mem_wr_rst_chm = 1; @@ -561,6 +562,7 @@ static inline void rmt_ll_rx_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, ui * @param channel RMT RX channel number * @param thres Time length threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { dev->chmconf[channel].conf0.idle_thres_chm = thres; @@ -586,6 +588,7 @@ static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, rmt * @param channel RMT RX chanenl number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->chmconf[channel].conf1.rx_filter_en_chm = enable; @@ -598,6 +601,7 @@ static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, boo * @param channel RMT RX channel number * @param thres Filter threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { HAL_FORCE_MODIFY_U32_REG_FIELD(dev->chmconf[channel].conf1, rx_filter_thres_chm, thres); diff --git a/components/hal/esp32s2/include/hal/rmt_ll.h b/components/hal/esp32s2/include/hal/rmt_ll.h index e20f6de957..00730fec0c 100644 --- a/components/hal/esp32s2/include/hal/rmt_ll.h +++ b/components/hal/esp32s2/include/hal/rmt_ll.h @@ -123,7 +123,7 @@ static inline void rmt_ll_enable_mem_access_nonfifo(rmt_dev_t *dev, bool enable) * @param divider_numerator Numerator part of the divider */ static inline void rmt_ll_set_group_clock_src(rmt_dev_t *dev, uint32_t channel, rmt_clock_source_t src, - uint32_t divider_integral, uint32_t divider_denominator, uint32_t divider_numerator) + uint32_t divider_integral, uint32_t divider_denominator, uint32_t divider_numerator) { (void)divider_integral; (void)divider_denominator; @@ -508,6 +508,7 @@ static inline void rmt_ll_rx_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, ui * @param channel RMT RX channel number * @param thres Time length threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { HAL_FORCE_MODIFY_U32_REG_FIELD(dev->conf_ch[channel].conf0, idle_thres_chn, thres); @@ -533,6 +534,7 @@ static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, rmt * @param channel RMT RX chanenl number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->conf_ch[channel].conf1.rx_filter_en_chn = enable; @@ -545,6 +547,7 @@ static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, boo * @param channel RMT RX channel number * @param thres Filter threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { HAL_FORCE_MODIFY_U32_REG_FIELD(dev->conf_ch[channel].conf1, rx_filter_thres_chn, thres); diff --git a/components/hal/esp32s3/include/hal/rmt_ll.h b/components/hal/esp32s3/include/hal/rmt_ll.h index 223f24dc5e..7d5dcf5eec 100644 --- a/components/hal/esp32s3/include/hal/rmt_ll.h +++ b/components/hal/esp32s3/include/hal/rmt_ll.h @@ -496,6 +496,7 @@ static inline void rmt_ll_rx_set_channel_clock_div(rmt_dev_t *dev, uint32_t chan * @param dev Peripheral instance address * @param channel RMT RX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel) { dev->chmconf[channel].conf1.mem_wr_rst_chm = 1; @@ -551,6 +552,7 @@ static inline void rmt_ll_rx_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, ui * @param channel RMT RX channel number * @param thres Time length threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { dev->chmconf[channel].conf0.idle_thres_chm = thres; @@ -576,6 +578,7 @@ static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, rmt * @param channel RMT RX chanenl number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->chmconf[channel].conf1.rx_filter_en_chm = enable; @@ -588,6 +591,7 @@ static inline void rmt_ll_rx_enable_filter(rmt_dev_t *dev, uint32_t channel, boo * @param channel RMT RX channel number * @param thres Filter threshold */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, uint32_t thres) { HAL_FORCE_MODIFY_U32_REG_FIELD(dev->chmconf[channel].conf1, rx_filter_thres_chm, thres); diff --git a/docs/en/api-reference/peripherals/rmt.rst b/docs/en/api-reference/peripherals/rmt.rst index f1585ecf11..a3b8664570 100644 --- a/docs/en/api-reference/peripherals/rmt.rst +++ b/docs/en/api-reference/peripherals/rmt.rst @@ -550,7 +550,9 @@ There is a Kconfig option :ref:`CONFIG_RMT_ISR_IRAM_SAFE` that has the following 2. Place all functions used by the ISR into IRAM [2]_ 3. Place the driver object into DRAM in case it is mapped to PSRAM by accident -This Kconfig option allows the interrupt to run while the cache is disabled but comes at the cost of increased IRAM consumption. +This Kconfig option allows the interrupt handler to run while the cache is disabled but comes at the cost of increased IRAM consumption. + +Another Kconfig option :ref:`CONFIG_RMT_RECV_FUNC_IN_IRAM` can place :cpp:func:`rmt_receive` into the IRAM as well. So that the receive function can be used even when the flash cache is disabled. .. _rmt-thread-safety: @@ -560,6 +562,10 @@ Thread Safety The factory function :cpp:func:`rmt_new_tx_channel`, :cpp:func:`rmt_new_rx_channel` and :cpp:func:`rmt_new_sync_manager` are guaranteed to be thread-safe by the driver, which means, user can call them from different RTOS tasks without protection by extra locks. Other functions that take the :cpp:type:`rmt_channel_handle_t` and :cpp:type:`rmt_sync_manager_handle_t` as the first positional parameter, are not thread-safe. which means the user should avoid calling them from multiple tasks. +The following functions are allowed to use under ISR context as well. + +- :cpp:func:`rmt_receive` + .. _rmt-kconfig-options: Kconfig Options @@ -567,6 +573,7 @@ Kconfig Options - :ref:`CONFIG_RMT_ISR_IRAM_SAFE` controls whether the default ISR handler can work when cache is disabled, see also :ref:`rmt-iram-safe` for more information. - :ref:`CONFIG_RMT_ENABLE_DEBUG_LOG` is used to enable the debug log at the cost of increased firmware binary size. +- :ref:`CONFIG_RMT_RECV_FUNC_IN_IRAM` controls where to place the RMT receive function (IRAM or Flash), see :ref:`rmt-iram-safe` for more information. Application Examples -------------------- diff --git a/docs/zh_CN/api-reference/peripherals/rmt.rst b/docs/zh_CN/api-reference/peripherals/rmt.rst index 9008dd44a2..2080cf59a1 100644 --- a/docs/zh_CN/api-reference/peripherals/rmt.rst +++ b/docs/zh_CN/api-reference/peripherals/rmt.rst @@ -552,6 +552,8 @@ IRAM 安全 启用该选项可以保证 cache 禁用时的中断运行，但会相应增加 IRAM 占用。 +另外一个 Kconfig 选项 :ref:`CONFIG_RMT_RECV_FUNC_IN_IRAM` 可以将 :cpp:func:`rmt_receive` 函数放进内部的 IRAM 中，从而当 flash cache 被关闭的时候，这个函数也能够被使用。 + .. _rmt-thread-safety: 线程安全 @@ -560,6 +562,10 @@ IRAM 安全 RMT 驱动程序会确保工厂函数 :cpp:func:`rmt_new_tx_channel`、:cpp:func:`rmt_new_rx_channel` 和 :cpp:func:`rmt_new_sync_manager` 的线程安全。使用时，可以直接从不同的 RTOS 任务中调用此类函数，无需额外锁保护。 其他以 :cpp:type:`rmt_channel_handle_t` 和 :cpp:type:`rmt_sync_manager_handle_t` 作为第一个位置参数的函数均非线程安全，在没有设置互斥锁保护的任务中，应避免从多个任务中调用这类函数。 +以下函数允许在 ISR 上下文中使用： + +- :cpp:func:`rmt_receive` + .. _rmt-kconfig-options: Kconfig 选项 @@ -567,6 +573,7 @@ Kconfig 选项 - :ref:`CONFIG_RMT_ISR_IRAM_SAFE` 控制默认 ISR 处理程序能否在禁用 cache 的情况下工作。详情请参阅 :ref:`rmt-iram-safe`。 - :ref:`CONFIG_RMT_ENABLE_DEBUG_LOG` 用于启用调试日志输出，启用此选项将增加固件的二进制文件大小。 +- :ref:`CONFIG_RMT_RECV_FUNC_IN_IRAM` 用于控制 RMT 接收函数被链接到系统内存的哪个位置（IRAM 还是 Flash）。详情请参阅 :ref:`rmt-iram-safe`。 应用示例 --------------------