feat(esp32h21): introduce target esp32h21(stage 1)

Kconfig

@@ -136,6 +136,14 @@ mainmenu "Espressif IoT Development Framework Configuration"
         select FREERTOS_UNICORE
         select IDF_TARGET_ARCH_RISCV
 
+    config IDF_TARGET_ESP32H21
+        bool
+        default "y" if IDF_TARGET="esp32h21"
+        select FREERTOS_UNICORE
+        select IDF_TARGET_ARCH_RISCV
+        select IDF_ENV_FPGA
+        select IDF_ENV_BRINGUP
+
     config IDF_TARGET_LINUX
         bool
         default "y" if IDF_TARGET="linux"
@@ -152,6 +160,7 @@ mainmenu "Espressif IoT Development Framework Configuration"
         default 0x0012 if IDF_TARGET_ESP32P4
         default 0x0017 if IDF_TARGET_ESP32C5
         default 0x0014 if IDF_TARGET_ESP32C61
+        default 0x0019 if IDF_TARGET_ESP32H21
         default 0xFFFF
 
 

components/app_update/test_apps/test_app_update/.build-test-rules.yml

@@ -2,7 +2,7 @@
 
 components/app_update/test_apps:
   enable:
-    - if: CONFIG_NAME == "defaults" and IDF_TARGET != "linux"
+    - if: CONFIG_NAME == "defaults" and IDF_TARGET in ["esp32", "esp32c2", "esp32c3", "esp32c5", "esp32c6", "esp32c61", "esp32h2", "esp32p4", "esp32s2", "esp32s3"]
     - if: CONFIG_NAME == "xip_psram" and IDF_TARGET in ["esp32s2", "esp32s3", "esp32p4"]
     # S2 doesn't have ROM for flash
     - if: CONFIG_NAME == "xip_psram_with_rom_impl" and IDF_TARGET in ["esp32s3", "esp32p4"]

components/esp_hw_support/include/esp_chip_info.h

@@ -30,6 +30,7 @@ typedef enum {
     CHIP_ESP32P4 = 18, //!< ESP32-P4
     CHIP_ESP32C61= 20, //!< ESP32-C61
     CHIP_ESP32C5 = 23, //!< ESP32-C5
+    CHIP_ESP32H21 = 25, //!< ESP32-H21
     CHIP_POSIX_LINUX = 999, //!< The code is running on POSIX/Linux simulator
 } esp_chip_model_t;
 

components/spi_flash/test_apps/.build-test-rules.yml

@@ -31,7 +31,7 @@ components/spi_flash/test_apps/flash_mmap:
     - esp_mm
     - spi_flash
   enable:
-    - if: CONFIG_NAME in ["release", "rom_impl"] and IDF_TARGET != "linux"
+    - if: CONFIG_NAME in ["release", "rom_impl"] and IDF_TARGET in ["esp32", "esp32c2", "esp32c3", "esp32c5", "esp32c6", "esp32c61", "esp32h2", "esp32p4", "esp32s2", "esp32s3"]
     - if: CONFIG_NAME == "xip_psram" and IDF_TARGET in ["esp32s2", "esp32s3", "esp32p4"]
     # S2 doesn't have ROM for flash
     - if: CONFIG_NAME == "xip_psram_with_rom_impl" and IDF_TARGET in ["esp32s3", "esp32p4"]

tools/ci/check_build_test_rules.py

@@ -36,6 +36,7 @@ USUAL_TO_FORMAL = {
     'esp32h2': 'ESP32-H2',
     'esp32p4': 'ESP32-P4',
     'esp32c61': 'ESP32-C61',
+    'esp32h21': 'ESP32-H21',
     'linux': 'Linux',
 }
 
@@ -50,6 +51,7 @@ FORMAL_TO_USUAL = {
     'ESP32-H2': 'esp32h2',
     'ESP32-P4': 'esp32p4',
     'ESP32-C61': 'esp32c61',
+    'ESP32-H21': 'esp32h21',
     'Linux': 'linux',
 }
 

tools/cmake/dfu.cmake

@@ -21,6 +21,8 @@ function(__add_dfu_targets)
         return()
     elseif("${target}" STREQUAL "esp32h2")
         return()
+    elseif("${target}" STREQUAL "esp32h21")
+        return()
     elseif("${target}" STREQUAL "esp32p4")
         set(dfu_pid "12")
     elseif("${target}" STREQUAL "linux")

tools/cmake/toolchain-esp32h21.cmake

@@ -0,0 +1,18 @@
+include($ENV{IDF_PATH}/tools/cmake/utilities.cmake)
+
+set(CMAKE_SYSTEM_NAME Generic)
+
+set(CMAKE_C_COMPILER riscv32-esp-elf-gcc)
+set(CMAKE_CXX_COMPILER riscv32-esp-elf-g++)
+set(CMAKE_ASM_COMPILER riscv32-esp-elf-gcc)
+set(_CMAKE_TOOLCHAIN_PREFIX riscv32-esp-elf-)
+
+remove_duplicated_flags("-march=rv32imac_zicsr_zifencei ${CMAKE_C_FLAGS}" UNIQ_CMAKE_C_FLAGS)
+set(CMAKE_C_FLAGS "${UNIQ_CMAKE_C_FLAGS}" CACHE STRING "C Compiler Base Flags" FORCE)
+remove_duplicated_flags("-march=rv32imac_zicsr_zifencei ${CMAKE_CXX_FLAGS}" UNIQ_CMAKE_CXX_FLAGS)
+set(CMAKE_CXX_FLAGS "${UNIQ_CMAKE_CXX_FLAGS}" CACHE STRING "C++ Compiler Base Flags" FORCE)
+
+remove_duplicated_flags("-nostartfiles -march=rv32imac_zicsr_zifencei --specs=nosys.specs \
+                        ${CMAKE_EXE_LINKER_FLAGS}"
+                        UNIQ_CMAKE_SAFE_EXE_LINKER_FLAGS)
+set(CMAKE_EXE_LINKER_FLAGS "${UNIQ_CMAKE_SAFE_EXE_LINKER_FLAGS}" CACHE STRING "Linker Base Flags" FORCE)

tools/idf_py_actions/constants.py

@@ -34,7 +34,7 @@ if os.name != 'nt':
 URL_TO_DOC = 'https://docs.espressif.com/projects/esp-idf'
 
 SUPPORTED_TARGETS = ['esp32', 'esp32s2', 'esp32c3', 'esp32s3', 'esp32c2', 'esp32c6', 'esp32h2', 'esp32p4']
-PREVIEW_TARGETS = ['linux', 'esp32c5', 'esp32c61']
+PREVIEW_TARGETS = ['linux', 'esp32c5', 'esp32c61', 'esp32h21']
 
 OPENOCD_TAGET_CONFIG_DEFAULT = '-f interface/ftdi/esp32_devkitj_v1.cfg -f target/{target}.cfg'
 OPENOCD_TAGET_CONFIG: Dict[str, str] = {

tools/test_apps/system/.build-test-rules.yml

@@ -24,8 +24,8 @@ tools/test_apps/system/cxx_no_except:
       reason: the other targets are not tested yet
 
 tools/test_apps/system/eh_frame:
-  enable:
-    - if: IDF_TARGET not in ["esp32", "esp32s2", "esp32s3", "linux"]
+  disable:
+    - if: IDF_TARGET in ["esp32", "esp32s2", "esp32s3", "linux"]
       reason: Only relevant for riscv targets
 
 tools/test_apps/system/esp_intr_dump:

tools/tools.json

@@ -95,7 +95,8 @@
         "esp32c5",
         "esp32h2",
         "esp32p4",
-        "esp32c61"
+        "esp32c61",
+        "esp32h21"
       ],
       "version_cmd": [
         "riscv32-esp-elf-gdb-no-python",
@@ -252,7 +253,8 @@
         "esp32c5",
         "esp32h2",
         "esp32p4",
-        "esp32c61"
+        "esp32c61",
+        "esp32h21"
       ],
       "version_cmd": [
         "clang",
@@ -318,7 +320,8 @@
         "esp32c5",
         "esp32h2",
         "esp32c61",
-        "esp32p4"
+        "esp32p4",
+        "esp32h21"
       ],
       "version_cmd": [
         "riscv32-esp-elf-gcc",