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refactor(freertos): Refactor usage of portBASE_TYPE to BaseType_t

Browse Source 
portBASE_TYPE is an internal macro defined by the porting layer. This commit
changes all references to BaseType_t which is the official type exposed by
FreeRTOS.
This commit is contained in:
Darian Leung 2023-07-31 17:10:34 +02:00
parent 1e51387222
commit 6fc935e584
19 changed files with 70 additions and 70 deletions
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2
components/driver/deprecated/adc_dma_legacy.c
View File

@ -367,7 +367,7 @@ static IRAM_ATTR void adc_dma_intr_handler(void *arg)
static IRAM_ATTR bool s_adc_dma_intr(adc_digi_context_t *adc_digi_ctx)
{
portBASE_TYPE taskAwoken = 0;
BaseType_t taskAwoken = 0;
BaseType_t ret;
adc_hal_dma_desc_status_t status = false;
uint8_t *finished_buffer = NULL;

14
components/driver/deprecated/i2s_legacy.c
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -159,8 +159,8 @@ __attribute__((weak)) esp_err_t i2s_platform_release_occupation(int id);
static bool IRAM_ATTR i2s_dma_rx_callback(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data)
{
i2s_obj_t *p_i2s = (i2s_obj_t *) user_data;
portBASE_TYPE need_awoke = 0;
portBASE_TYPE tmp = 0;
BaseType_t need_awoke = 0;
BaseType_t tmp = 0;
int dummy;
i2s_event_t i2s_event;
uint32_t finish_desc;
@ -191,8 +191,8 @@ static bool IRAM_ATTR i2s_dma_rx_callback(gdma_channel_handle_t dma_chan, gdma_e
static bool IRAM_ATTR i2s_dma_tx_callback(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data)
{
i2s_obj_t *p_i2s = (i2s_obj_t *) user_data;
portBASE_TYPE need_awoke = 0;
portBASE_TYPE tmp = 0;
BaseType_t need_awoke = 0;
BaseType_t tmp = 0;
int dummy;
i2s_event_t i2s_event;
uint32_t finish_desc;
@ -235,8 +235,8 @@ static void IRAM_ATTR i2s_intr_handler_default(void *arg)
i2s_event_t i2s_event;
int dummy;
portBASE_TYPE need_awoke = 0;
portBASE_TYPE tmp = 0;
BaseType_t need_awoke = 0;
BaseType_t tmp = 0;
uint32_t finish_desc = 0;
if ((status & I2S_LL_EVENT_TX_DSCR_ERR) || (status & I2S_LL_EVENT_RX_DSCR_ERR)) {
ESP_EARLY_LOGE(TAG, "dma error, interrupt status: 0x%08x", status);

2
components/driver/deprecated/rmt_legacy.c
View File

@ -719,7 +719,7 @@ static void IRAM_ATTR rmt_driver_isr_default(void *arg)
rmt_item32_t *addr = NULL;
uint8_t channel = 0;
rmt_hal_context_t *hal = (rmt_hal_context_t *)arg;
portBASE_TYPE HPTaskAwoken = pdFALSE;
BaseType_t HPTaskAwoken = pdFALSE;
// Tx end interrupt
status = rmt_ll_get_tx_end_interrupt_status(hal->regs);

16
components/driver/i2c/i2c.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -229,7 +229,7 @@ static i2c_clk_alloc_t i2c_clk_alloc[] = {
static i2c_obj_t *p_i2c_obj[I2C_NUM_MAX] = {0};
static void i2c_isr_handler_default(void *arg);
static void i2c_master_cmd_begin_static(i2c_port_t i2c_num, portBASE_TYPE* HPTaskAwoken);
static void i2c_master_cmd_begin_static(i2c_port_t i2c_num, BaseType_t* HPTaskAwoken);
static esp_err_t i2c_hw_fsm_reset(i2c_port_t i2c_num);
static void i2c_hw_disable(i2c_port_t i2c_num)
@ -536,8 +536,8 @@ static void IRAM_ATTR i2c_isr_handler_default(void *arg)
return;
}
i2c_intr_event_t evt_type = I2C_INTR_EVENT_ERR;
portBASE_TYPE HPTaskAwoken = pdFALSE;
portBASE_TYPE HPTaskAwokenCallee = pdFALSE;
BaseType_t HPTaskAwoken = pdFALSE;
BaseType_t HPTaskAwokenCallee = pdFALSE;
if (p_i2c->mode == I2C_MODE_MASTER) {
if (p_i2c->status == I2C_STATUS_WRITE) {
i2c_hal_master_handle_tx_event(&(i2c_context[i2c_num].hal), &evt_type);
@ -1357,7 +1357,7 @@ static inline bool i2c_cmd_is_single_byte(const i2c_cmd_t *cmd) {
return cmd->total_bytes == 1;
}
static void IRAM_ATTR i2c_master_cmd_begin_static(i2c_port_t i2c_num, portBASE_TYPE* HPTaskAwoken)
static void IRAM_ATTR i2c_master_cmd_begin_static(i2c_port_t i2c_num, BaseType_t* HPTaskAwoken)
{
i2c_obj_t *p_i2c = p_i2c_obj[i2c_num];
i2c_cmd_evt_t evt = { 0 };
@ -1504,7 +1504,7 @@ esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle,
esp_err_t ret = ESP_FAIL;
i2c_obj_t *p_i2c = p_i2c_obj[i2c_num];
TickType_t ticks_start = xTaskGetTickCount();
portBASE_TYPE res = xSemaphoreTake(p_i2c->cmd_mux, ticks_to_wait);
BaseType_t res = xSemaphoreTake(p_i2c->cmd_mux, ticks_to_wait);
if (res == pdFALSE) {
return ESP_ERR_TIMEOUT;
}
@ -1554,7 +1554,7 @@ esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle,
// In master mode, since we don't have an interrupt to detective bus error or FSM state, what we do here is to make
// sure the interrupt mechanism for master mode is still working.
// If the command sending is not finished and there is no interrupt any more, the bus is probably dead caused by external noise.
portBASE_TYPE evt_res = xQueueReceive(p_i2c->cmd_evt_queue, &evt, wait_time);
BaseType_t evt_res = xQueueReceive(p_i2c->cmd_evt_queue, &evt, wait_time);
if (evt_res == pdTRUE) {
if (evt.type == I2C_CMD_EVT_DONE) {
if (p_i2c->status == I2C_STATUS_TIMEOUT) {
@ -1602,7 +1602,7 @@ int i2c_slave_write_buffer(i2c_port_t i2c_num, const uint8_t *data, int size, Ti
ESP_RETURN_ON_FALSE(p_i2c_obj[i2c_num]->mode == I2C_MODE_SLAVE, ESP_FAIL, I2C_TAG, I2C_MODE_SLAVE_ERR_STR);
i2c_obj_t *p_i2c = p_i2c_obj[i2c_num];
portBASE_TYPE res;
BaseType_t res;
int cnt = 0;
TickType_t ticks_end = xTaskGetTickCount() + ticks_to_wait;

26
components/driver/i2s/i2s_common.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -504,9 +504,9 @@ uint32_t i2s_get_source_clk_freq(i2s_clock_src_t clk_src, uint32_t mclk_freq_hz)
static bool IRAM_ATTR i2s_dma_rx_callback(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data)
{
i2s_chan_handle_t handle = (i2s_chan_handle_t)user_data;
portBASE_TYPE need_yield1 = 0;
portBASE_TYPE need_yield2 = 0;
portBASE_TYPE user_need_yield = 0;
BaseType_t need_yield1 = 0;
BaseType_t need_yield2 = 0;
BaseType_t user_need_yield = 0;
lldesc_t *finish_desc;
uint32_t dummy;
@ -533,9 +533,9 @@ static bool IRAM_ATTR i2s_dma_rx_callback(gdma_channel_handle_t dma_chan, gdma_e
static bool IRAM_ATTR i2s_dma_tx_callback(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data)
{
i2s_chan_handle_t handle = (i2s_chan_handle_t)user_data;
portBASE_TYPE need_yield1 = 0;
portBASE_TYPE need_yield2 = 0;
portBASE_TYPE user_need_yield = 0;
BaseType_t need_yield1 = 0;
BaseType_t need_yield2 = 0;
BaseType_t user_need_yield = 0;
lldesc_t *finish_desc;
uint32_t dummy;
@ -567,9 +567,9 @@ static bool IRAM_ATTR i2s_dma_tx_callback(gdma_channel_handle_t dma_chan, gdma_e
static void IRAM_ATTR i2s_dma_rx_callback(void *arg)
{
portBASE_TYPE need_yield1 = 0;
portBASE_TYPE need_yield2 = 0;
portBASE_TYPE user_need_yield = 0;
BaseType_t need_yield1 = 0;
BaseType_t need_yield2 = 0;
BaseType_t user_need_yield = 0;
lldesc_t *finish_desc = NULL;
i2s_event_data_t evt;
i2s_chan_handle_t handle = (i2s_chan_handle_t)arg;
@ -605,9 +605,9 @@ static void IRAM_ATTR i2s_dma_rx_callback(void *arg)
static void IRAM_ATTR i2s_dma_tx_callback(void *arg)
{
portBASE_TYPE need_yield1 = 0;
portBASE_TYPE need_yield2 = 0;
portBASE_TYPE user_need_yield = 0;
BaseType_t need_yield1 = 0;
BaseType_t need_yield2 = 0;
BaseType_t user_need_yield = 0;
lldesc_t *finish_desc = NULL;
i2s_event_data_t evt;
i2s_chan_handle_t handle = (i2s_chan_handle_t)arg;

2
components/driver/ledc/ledc.c
View File

@ -862,7 +862,7 @@ static inline void IRAM_ATTR ledc_calc_fade_end_channel(uint32_t *fade_end_statu
void IRAM_ATTR ledc_fade_isr(void *arg)
{
bool cb_yield = false;
portBASE_TYPE HPTaskAwoken = pdFALSE;
BaseType_t HPTaskAwoken = pdFALSE;
uint32_t speed_mode = 0;
uint32_t channel = 0;
uint32_t intr_status = 0;

20
components/driver/sdio_slave/sdio_slave.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -455,7 +455,7 @@ static void sdio_intr_host(void *arg)
{
sdio_slave_ll_slvint_t int_val;
sdio_slave_hal_slvint_fetch_clear(context.hal, &int_val);
portBASE_TYPE yield = pdFALSE;
BaseType_t yield = pdFALSE;
for (int i = 0; i < 8; i++) {
if (BIT(i) & int_val) {
if (context.config.event_cb != NULL) {
@ -545,14 +545,14 @@ esp_err_t sdio_slave_send_host_int(uint8_t pos)
static void sdio_intr_send(void *arg)
{
ESP_EARLY_LOGV(TAG, "intr_send");
portBASE_TYPE yield = pdFALSE;
BaseType_t yield = pdFALSE;
// this interrupt is abused to get ISR invoked by app
sdio_slave_hal_send_handle_isr_invoke(context.hal);
uint32_t returned_cnt;
if (sdio_slave_hal_send_eof_happened(context.hal)) {
portBASE_TYPE ret __attribute__((unused));
BaseType_t ret __attribute__((unused));
esp_err_t err;
while (1) {
@ -587,7 +587,7 @@ esp_err_t sdio_slave_send_queue(uint8_t *addr, size_t len, void *arg, TickType_t
SDIO_SLAVE_CHECK(esp_ptr_dma_capable(addr) && (uint32_t)addr % 4 == 0, "buffer to send should be DMA capable and 32-bit aligned",
ESP_ERR_INVALID_ARG);
portBASE_TYPE cnt_ret = xSemaphoreTake(context.remain_cnt, wait);
BaseType_t cnt_ret = xSemaphoreTake(context.remain_cnt, wait);
if (cnt_ret != pdTRUE) {
return ESP_ERR_TIMEOUT;
}
@ -605,7 +605,7 @@ esp_err_t sdio_slave_send_queue(uint8_t *addr, size_t len, void *arg, TickType_t
esp_err_t sdio_slave_send_get_finished(void **out_arg, TickType_t wait)
{
void *arg = NULL;
portBASE_TYPE err = xQueueReceive(context.ret_queue, &arg, wait);
BaseType_t err = xQueueReceive(context.ret_queue, &arg, wait);
if (out_arg) {
*out_arg = arg;
}
@ -637,7 +637,7 @@ esp_err_t sdio_slave_transmit(uint8_t *addr, size_t len)
static esp_err_t send_flush_data(void)
{
esp_err_t err;
portBASE_TYPE ret __attribute__((unused));
BaseType_t ret __attribute__((unused));
while (1) {
void *finished_arg;
@ -684,7 +684,7 @@ static inline void critical_exit_recv(void)
static esp_err_t recv_flush_data(void)
{
while (1) {
portBASE_TYPE ret = xSemaphoreTake(context.recv_event, 0);
BaseType_t ret = xSemaphoreTake(context.recv_event, 0);
if (ret == pdFALSE) {
break;
}
@ -697,7 +697,7 @@ static esp_err_t recv_flush_data(void)
static void sdio_intr_recv(void *arg)
{
portBASE_TYPE yield = 0;
BaseType_t yield = 0;
bool triggered = sdio_slave_hal_recv_done(context.hal);
while (triggered) {
portENTER_CRITICAL_ISR(&context.recv_spinlock);
@ -771,7 +771,7 @@ esp_err_t sdio_slave_recv(sdio_slave_buf_handle_t *handle_ret, uint8_t **out_add
esp_err_t sdio_slave_recv_packet(sdio_slave_buf_handle_t *handle_ret, TickType_t wait)
{
SDIO_SLAVE_CHECK(handle_ret != NULL, "handle address cannot be 0", ESP_ERR_INVALID_ARG);
portBASE_TYPE err = xSemaphoreTake(context.recv_event, wait);
BaseType_t err = xSemaphoreTake(context.recv_event, wait);
if (err == pdFALSE) {
return ESP_ERR_TIMEOUT;
}

2
components/driver/uart/uart.c
View File

@ -838,7 +838,7 @@ static void UART_ISR_ATTR uart_rx_intr_handler_default(void *param)
int rx_fifo_len = 0;
uint32_t uart_intr_status = 0;
uart_event_t uart_event;
portBASE_TYPE HPTaskAwoken = 0;
BaseType_t HPTaskAwoken = 0;
bool need_yield = false;
static uint8_t pat_flg = 0;
BaseType_t sent = pdFALSE;

2
components/driver/usb_serial_jtag/usb_serial_jtag.c
View File

@ -45,7 +45,7 @@ static void usb_serial_jtag_write_and_flush(const uint8_t *buf, uint32_t wr_len)
}
static void usb_serial_jtag_isr_handler_default(void *arg) {
portBASE_TYPE xTaskWoken = 0;
BaseType_t xTaskWoken = 0;
uint32_t usbjtag_intr_status = 0;
usbjtag_intr_status = usb_serial_jtag_ll_get_intsts_mask();

2
components/esp_adc/adc_continuous.c
View File

@ -288,7 +288,7 @@ static IRAM_ATTR void adc_dma_intr_handler(void *arg)
static IRAM_ATTR bool s_adc_dma_intr(adc_continuous_ctx_t *adc_digi_ctx)
{
portBASE_TYPE taskAwoken = 0;
BaseType_t taskAwoken = 0;
bool need_yield = false;
BaseType_t ret;
adc_hal_dma_desc_status_t status = false;

2
components/esp_system/esp_ipc.c
View File

@ -118,7 +118,7 @@ static void esp_ipc_init(void)
task_name[3] = i + (char)'0';
s_ipc_mutex[i] = xSemaphoreCreateMutexStatic(&s_ipc_mutex_buffer[i]);
s_ipc_ack[i] = xSemaphoreCreateBinaryStatic(&s_ipc_ack_buffer[i]);
portBASE_TYPE res = xTaskCreatePinnedToCore(ipc_task, task_name, IPC_STACK_SIZE, (void*) i,
BaseType_t res = xTaskCreatePinnedToCore(ipc_task, task_name, IPC_STACK_SIZE, (void*) i,
configMAX_PRIORITIES - 1, &s_ipc_task_handle[i], i);
assert(res == pdTRUE);
(void)res;

8
components/freertos/FreeRTOS-Kernel-SMP/portable/linux/include/freertos/portmacro.h
View File

@ -61,7 +61,7 @@ extern "C" {
typedef portSTACK_TYPE StackType_t;
typedef portBASE_TYPE BaseType_t;
typedef unsigned long UBaseType_t;
typedef unsigned portBASE_TYPE UBaseType_t;
typedef unsigned long TickType_t;
#define portMAX_DELAY ( TickType_t ) ULONG_MAX
@ -174,11 +174,11 @@ extern void vTaskExitCritical( void );
#define portEXIT_CRITICAL(...) CHOOSE_MACRO_VA_ARG(portEXIT_CRITICAL_IDF, portEXIT_CRITICAL_SMP, ##__VA_ARGS__)(__VA_ARGS__)
#endif
extern portBASE_TYPE xPortSetInterruptMask( void );
extern void vPortClearInterruptMask( portBASE_TYPE xMask );
extern BaseType_t xPortSetInterruptMask( void );
extern void vPortClearInterruptMask( BaseType_t xMask );
#define portSET_INTERRUPT_MASK_FROM_ISR() ({ \
portBASE_TYPE cur_level; \
BaseType_t cur_level; \
cur_level = xPortSetInterruptMask(); \
vTaskEnterCritical(); \
cur_level; \

16
components/freertos/FreeRTOS-Kernel-SMP/portable/linux/port.c
View File

@ -105,12 +105,12 @@ static sigset_t xSchedulerOriginalSignalMask;
static pthread_t hMainThread = ( pthread_t )NULL;
// These are saved as part of a thread's state in prvSwitchThread()
static volatile portBASE_TYPE uxCriticalNestingIDF = 0; /* Track nesting calls for IDF style critical sections. FreeRTOS critical section nesting is maintained in the TCB. */
static volatile BaseType_t uxCriticalNestingIDF = 0; /* Track nesting calls for IDF style critical sections. FreeRTOS critical section nesting is maintained in the TCB. */
static volatile UBaseType_t uxInterruptNesting = 0; /* Tracks if we are currently in an interrupt. */
static volatile portBASE_TYPE uxInterruptLevel = 0; /* Tracks the current level (i.e., interrupt mask) */
static volatile BaseType_t uxInterruptLevel = 0; /* Tracks the current level (i.e., interrupt mask) */
/*-----------------------------------------------------------*/
static portBASE_TYPE xSchedulerEnd = pdFALSE;
static BaseType_t xSchedulerEnd = pdFALSE;
/*-----------------------------------------------------------*/
static void prvSetupSignalsAndSchedulerPolicy( void );
@ -188,7 +188,7 @@ void vPortStartFirstTask( void )
/*
* See header file for description.
*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
int iSignal;
sigset_t xSignals;
@ -320,18 +320,18 @@ void vPortYield( void )
Hence, we need to call vPortDisableInterrupts() and vPortEnableInterrupts(), otherwise interrupts
are never disabled/enabled. */
portBASE_TYPE xPortSetInterruptMask( void )
BaseType_t xPortSetInterruptMask( void )
{
if (uxInterruptLevel == 0 && uxCriticalNestingIDF == 0) {
vPortDisableInterrupts();
}
portBASE_TYPE prev_intr_level = uxInterruptLevel;
BaseType_t prev_intr_level = uxInterruptLevel;
uxInterruptLevel++;
return prev_intr_level;
}
/*-----------------------------------------------------------*/
void vPortClearInterruptMask( portBASE_TYPE xMask )
void vPortClearInterruptMask( BaseType_t xMask )
{
// Only reenable interrupts if xMask is 0
uxInterruptLevel = xMask;
@ -646,7 +646,7 @@ int main(int argc, const char **argv)
usleep(1000);
portBASE_TYPE res;
BaseType_t res;
#if ( configNUM_CORES > 1 )
res = xTaskCreateAffinitySet(&main_task, "main",

8
components/freertos/FreeRTOS-Kernel/portable/linux/include/freertos/portmacro.h
View File

@ -58,8 +58,8 @@ extern "C" {
#define portPOINTER_SIZE_TYPE intptr_t
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
typedef portBASE_TYPE BaseType_t;
typedef unsigned portBASE_TYPE UBaseType_t;
typedef unsigned long TickType_t;
#define portMAX_DELAY ( TickType_t ) ULONG_MAX
@ -91,8 +91,8 @@ extern void vPortEnableInterrupts( void );
#define portSET_INTERRUPT_MASK() ( vPortDisableInterrupts() )
#define portCLEAR_INTERRUPT_MASK() ( vPortEnableInterrupts() )
extern portBASE_TYPE xPortSetInterruptMask( void );
extern void vPortClearInterruptMask( portBASE_TYPE xMask );
extern BaseType_t xPortSetInterruptMask( void );
extern void vPortClearInterruptMask( BaseType_t xMask );
extern void vPortEnterCritical( void );
extern void vPortExitCritical( void );

10
components/freertos/FreeRTOS-Kernel/portable/linux/port.c
View File

@ -98,10 +98,10 @@ static pthread_once_t hSigSetupThread = PTHREAD_ONCE_INIT;
static sigset_t xAllSignals;
static sigset_t xSchedulerOriginalSignalMask;
static pthread_t hMainThread = ( pthread_t )NULL;
static volatile portBASE_TYPE uxCriticalNesting;
static volatile BaseType_t uxCriticalNesting;
/*-----------------------------------------------------------*/
static portBASE_TYPE xSchedulerEnd = pdFALSE;
static BaseType_t xSchedulerEnd = pdFALSE;
/*-----------------------------------------------------------*/
static void prvSetupSignalsAndSchedulerPolicy( void );
@ -179,7 +179,7 @@ void vPortStartFirstTask( void )
/*
* See header file for description.
*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
int iSignal;
sigset_t xSignals;
@ -307,7 +307,7 @@ void vPortEnableInterrupts( void )
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortSetInterruptMask( void )
BaseType_t xPortSetInterruptMask( void )
{
/* Interrupts are always disabled inside ISRs (signals
handlers). */
@ -315,7 +315,7 @@ portBASE_TYPE xPortSetInterruptMask( void )
}
/*-----------------------------------------------------------*/
void vPortClearInterruptMask( portBASE_TYPE xMask )
void vPortClearInterruptMask( BaseType_t xMask )
{
}
/*-----------------------------------------------------------*/

2
components/freertos/FreeRTOS-Kernel/portable/linux/port_idf.c
View File

@ -55,7 +55,7 @@ int main(int argc, const char **argv)
setvbuf(stdout, NULL, _IOLBF, 0);
usleep(1000);
portBASE_TYPE res = xTaskCreatePinnedToCore(&main_task, "main",
BaseType_t res = xTaskCreatePinnedToCore(&main_task, "main",
ESP_TASK_MAIN_STACK, NULL,
ESP_TASK_MAIN_PRIO, NULL, ESP_TASK_MAIN_CORE);
assert(res == pdTRUE);

2
components/freertos/test_apps/freertos/kernel/event_groups/test_freertos_eventgroups.c
View File

@ -147,7 +147,7 @@ static bool test_clear_bits;
static bool on_timer_alarm_cb(gptimer_handle_t timer, const gptimer_alarm_event_data_t *edata, void *user_ctx)
{
portBASE_TYPE task_woken = pdFALSE;
BaseType_t task_woken = pdFALSE;
gptimer_stop(timer);

2
examples/bluetooth/esp_ble_mesh/common_components/button/button.c
View File

@ -187,7 +187,7 @@ static void button_press_serial_cb(void* tmr)
static void button_gpio_isr_handler(void* arg)
{
button_dev_t* btn = (button_dev_t*) arg;
portBASE_TYPE HPTaskAwoken = pdFALSE;
BaseType_t HPTaskAwoken = pdFALSE;
int level = gpio_get_level(btn->io_num);
if (level == btn->active_level) {
if (btn->tap_psh_cb.tmr) {

2
examples/peripherals/ledc/ledc_fade/main/ledc_fade_example_main.c
View File

@ -69,7 +69,7 @@
*/
static IRAM_ATTR bool cb_ledc_fade_end_event(const ledc_cb_param_t *param, void *user_arg)
{
portBASE_TYPE taskAwoken = pdFALSE;
BaseType_t taskAwoken = pdFALSE;
if (param->event == LEDC_FADE_END_EVT) {
SemaphoreHandle_t counting_sem = (SemaphoreHandle_t) user_arg;