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https://github.com/espressif/esp-idf
synced 2025-03-09 09:09:10 -04:00
feat(wpa_supplicant): Support all targets generically in fastpsk
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@ -55,8 +55,14 @@
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#include "fastpsk.h"
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#include <string.h>
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#include <sha/sha_dma.h>
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#include <hal/sha_hal.h>
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#include "soc/soc_caps.h"
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#if SOC_SHA_SUPPORT_PARALLEL_ENG
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#include "sha/sha_parallel_engine.h"
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#else
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#include "sha/sha_core.h"
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#endif
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#include "esp_log.h"
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#ifndef PUT_UINT32_BE
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#define PUT_UINT32_BE(n, b, i) \
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@ -96,13 +102,21 @@ struct fast_psk_context {
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/* Acquire SHA1 hardware for exclusive use */
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static inline void sha1_setup(void)
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{
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#if SOC_SHA_SUPPORT_PARALLEL_ENG
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esp_sha_lock_engine(SHA1);
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#else
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esp_sha_acquire_hardware();
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#endif
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}
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/* Release SHA1 hardware */
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static inline void sha1_teardown(void)
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{
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#if SOC_SHA_SUPPORT_PARALLEL_ENG
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esp_sha_unlock_engine(SHA1);
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#else
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esp_sha_release_hardware();
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#endif
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}
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/*
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@ -130,14 +144,34 @@ static void pad_blocks(union hmac_block *ctx, size_t len)
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* Performs SHA1 hash operation on two consecutive blocks.
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* Input: blocks array (two blocks of 64 bytes each), output (20-byte digest).
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*/
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#if CONFIG_IDF_TARGET_ESP32
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static inline void write32_be(uint32_t n, uint8_t out[4])
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{
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#if defined(__GNUC__) && __GNUC__ >= 4 && __BYTE_ORDER == __LITTLE_ENDIAN
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*(uint32_t *)(out) = __builtin_bswap32(n);
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#else
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out[0] = (n >> 24) & 0xff;
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out[1] = (n >> 16) & 0xff;
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out[2] = (n >> 8) & 0xff;
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out[3] = n & 0xff;
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#endif
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}
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#endif /* CONFIG_IDF_TARGET_ESP32 */
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void sha1_op(uint32_t blocks[FAST_PSK_SHA1_BLOCKS_BUF_WORDS], uint32_t output[SHA1_OUTPUT_SZ_WORDS])
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{
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/* First block */
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sha_hal_hash_block(SHA1, blocks, SHA1_BLOCK_SZ_WORDS, true);
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esp_sha_block(SHA1, blocks, true);
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/* Second block */
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sha_hal_hash_block(SHA1, &blocks[SHA1_BLOCK_SZ_WORDS], SHA1_BLOCK_SZ_WORDS, false);
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esp_sha_block(SHA1, &blocks[SHA1_BLOCK_SZ_WORDS], false);
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/* Read the final digest */
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sha_hal_read_digest(SHA1, output);
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esp_sha_read_digest_state(SHA1, output);
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#if CONFIG_IDF_TARGET_ESP32
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for (int i = 0; i < SHA1_OUTPUT_SZ_WORDS; i++) {
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write32_be(output[i], ((uint8_t*) output) + i * 4);
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}
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#endif /* CONFIG_IDF_TARGET_ESP32 */
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}
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/*
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