From 7563ae5e70f0b3e6158bc546b5e7da05b05e4c09 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Thu, 14 Nov 2024 21:42:00 +0800 Subject: [PATCH] fix(esp_system): deselect all modem modules clk source selection before clk init --- .../include/esp_private/esp_modem_clock.h | 8 +++++++- components/esp_hw_support/modem_clock.c | 11 +++++++++++ components/esp_system/port/soc/esp32c5/clk.c | 1 + components/esp_system/port/soc/esp32c6/clk.c | 1 + components/esp_system/port/soc/esp32c61/clk.c | 1 + components/esp_system/port/soc/esp32h2/clk.c | 2 ++ 6 files changed, 23 insertions(+), 1 deletion(-) diff --git a/components/esp_hw_support/include/esp_private/esp_modem_clock.h b/components/esp_hw_support/include/esp_private/esp_modem_clock.h index 953bbf1bf2..1fd4079944 100644 --- a/components/esp_hw_support/include/esp_private/esp_modem_clock.h +++ b/components/esp_hw_support/include/esp_private/esp_modem_clock.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -107,9 +107,15 @@ void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpcl /** * @brief Disable lowpower clock source selection + * @param module modem module */ void modem_clock_deselect_lp_clock_source(periph_module_t module); +/** +* @brief Disable all modem module's lowpower clock source selection + */ +void modem_clock_deselect_all_module_lp_clock_source(void); + /** * @brief Reset wifi mac */ diff --git a/components/esp_hw_support/modem_clock.c b/components/esp_hw_support/modem_clock.c index 9b2ad58a58..06fc76c1ee 100644 --- a/components/esp_hw_support/modem_clock.c +++ b/components/esp_hw_support/modem_clock.c @@ -346,6 +346,17 @@ void IRAM_ATTR modem_clock_module_disable(periph_module_t module) modem_clock_device_disable(MODEM_CLOCK_instance(), deps); } +void modem_clock_deselect_all_module_lp_clock_source(void) +{ +#if SOC_WIFI_SUPPORTED + modem_clock_hal_deselect_all_wifi_lpclk_source(MODEM_CLOCK_instance()->hal); +#endif +#if SOC_BT_SUPPORTED + modem_clock_hal_deselect_all_ble_rtc_timer_lpclk_source(MODEM_CLOCK_instance()->hal); +#endif + modem_clock_hal_deselect_all_coex_lpclk_source(MODEM_CLOCK_instance()->hal); +} + void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpclk_src_t src, uint32_t divider) { assert(IS_MODEM_MODULE(module)); diff --git a/components/esp_system/port/soc/esp32c5/clk.c b/components/esp_system/port/soc/esp32c5/clk.c index 19f5d2da72..12ab0a054b 100644 --- a/components/esp_system/port/soc/esp32c5/clk.c +++ b/components/esp_system/port/soc/esp32c5/clk.c @@ -83,6 +83,7 @@ __attribute__((weak)) void esp_clk_init(void) wdt_hal_write_protect_enable(&rtc_wdt_ctx); #endif + modem_clock_deselect_all_module_lp_clock_source(); #if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS) select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K); #elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC) diff --git a/components/esp_system/port/soc/esp32c6/clk.c b/components/esp_system/port/soc/esp32c6/clk.c index 6b07de2574..0704e4ba12 100644 --- a/components/esp_system/port/soc/esp32c6/clk.c +++ b/components/esp_system/port/soc/esp32c6/clk.c @@ -102,6 +102,7 @@ __attribute__((weak)) void esp_clk_init(void) wdt_hal_write_protect_enable(&rtc_wdt_ctx); #endif + modem_clock_deselect_all_module_lp_clock_source(); #if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS) select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K); #elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC) diff --git a/components/esp_system/port/soc/esp32c61/clk.c b/components/esp_system/port/soc/esp32c61/clk.c index ae318e027a..7309dda6c6 100644 --- a/components/esp_system/port/soc/esp32c61/clk.c +++ b/components/esp_system/port/soc/esp32c61/clk.c @@ -75,6 +75,7 @@ __attribute__((weak)) void esp_clk_init(void) wdt_hal_write_protect_enable(&rtc_wdt_ctx); #endif + modem_clock_deselect_all_module_lp_clock_source(); #if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS) select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K); #elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC) diff --git a/components/esp_system/port/soc/esp32h2/clk.c b/components/esp_system/port/soc/esp32h2/clk.c index 1cf17c9656..6d8ef80f22 100644 --- a/components/esp_system/port/soc/esp32h2/clk.c +++ b/components/esp_system/port/soc/esp32h2/clk.c @@ -43,6 +43,7 @@ #include "hal/temperature_sensor_ll.h" #include "hal/usb_serial_jtag_ll.h" #include "esp_private/periph_ctrl.h" +#include "esp_private/esp_modem_clock.h" #include "esp_private/esp_clk.h" #include "esp_private/esp_pmu.h" #include "esp_rom_uart.h" @@ -101,6 +102,7 @@ __attribute__((weak)) void esp_clk_init(void) wdt_hal_write_protect_enable(&rtc_wdt_ctx); #endif + modem_clock_deselect_all_module_lp_clock_source(); #if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS) select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K); #elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)