Merge branch 'bugfix/fix_rtc_freq_err_for_h2_beta1' into 'master'

Bugfix/fix rtc freq err for h2 beta1

See merge request espressif/esp-idf!18682
This commit is contained in:
morris 2022-07-04 16:46:17 +08:00
commit 7863c1bc45
11 changed files with 132 additions and 40 deletions

View File

@ -697,7 +697,11 @@ if(CONFIG_BT_ENABLED)
"-L${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c3_family/esp32s3")
target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
elseif(CONFIG_IDF_TARGET_ESP32H2)
add_prebuilt_library(nimblelib "controller/lib_esp32h2/esp32h2-bt-lib/libble_app.a")
if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1)
add_prebuilt_library(nimblelib "controller/lib_esp32h2/esp32h2-bt-lib/beta1/libble_app.a")
elseif(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2)
add_prebuilt_library(nimblelib "controller/lib_esp32h2/esp32h2-bt-lib/beta2/libble_app.a")
endif()
target_link_libraries(${COMPONENT_LIB} PRIVATE nimblelib)
elseif(CONFIG_IDF_TARGET_ESP32C2)
add_prebuilt_library(nimblelib "controller/lib_esp32c2/esp32c2-bt-lib/libble_app.a")

View File

@ -121,6 +121,10 @@ extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, v
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
extern void os_msys_buf_free(void);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
/* Local Function Declaration
*********************************************************************
@ -145,10 +149,6 @@ static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param
static uint32_t osi_random_wrapper(void);
static void esp_reset_rpa_moudle(void);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
/* Local variable definition
***************************************************************************
*/

View File

@ -35,6 +35,7 @@
#include "esp_pm.h"
#include "esp_phy_init.h"
#include "soc/system_reg.h"
#include "soc/clkrst_reg.h"
#include "hci_uart.h"
#include "bt_osi_mem.h"
@ -57,6 +58,13 @@
#define OSI_COEX_VERSION 0x00010006
#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1
#define EXT_FUNC_VERSION 0x20220125
#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2
#define EXT_FUNC_VERSION 0xE0000001
#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
#endif
/* Types definition
************************************************************************
*/
@ -86,6 +94,11 @@ struct ext_funcs_t {
void (* _task_delete)(void *task_handle);
void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
uint32_t (* _os_random)(void);
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1
int (* _ecc_gen_key_pair)(uint8_t *pub, uint8_t *priv);
int (* _ecc_gen_dh_key)(const uint8_t *remote_pub_key_x, const uint8_t *remote_pub_key_y, const uint8_t *local_priv_key, uint8_t *dhkey);
int (* _esp_reset_rpa_moudle)(void);
#endif
uint32_t magic;
};
@ -118,6 +131,10 @@ extern void r_ble_ll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, vo
extern int os_msys_init(void);
extern void os_msys_buf_free(void);
extern void bt_bb_set_le_tx_on_delay(uint32_t delay_us);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
/* Local Function Declaration
*********************************************************************
@ -141,6 +158,9 @@ static int esp_intr_free_wrapper(void **ret_handle);
static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
static uint32_t osi_random_wrapper(void);
static int esp_reset_rpa_moudle(void);
/* Local variable definition
***************************************************************************
*/
@ -177,7 +197,7 @@ static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
};
struct ext_funcs_t ext_funcs_ro = {
.ext_version = 0xE0000001,
.ext_version = EXT_FUNC_VERSION,
._esp_intr_alloc = esp_intr_alloc_wrapper,
._esp_intr_free = esp_intr_free_wrapper,
._malloc = bt_osi_mem_malloc_internal,
@ -194,9 +214,20 @@ struct ext_funcs_t ext_funcs_ro = {
._task_delete = task_delete_wrapper,
._osi_assert = osi_assert_wrapper,
._os_random = osi_random_wrapper,
.magic = 0xA5A5A5A5,
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1
._ecc_gen_key_pair = ble_sm_alg_gen_key_pair,
._ecc_gen_dh_key = ble_sm_alg_gen_dhkey,
._esp_reset_rpa_moudle = esp_reset_rpa_moudle,
#endif
.magic = EXT_FUNC_MAGIC_VALUE,
};
static int IRAM_ATTR esp_reset_rpa_moudle(void)
{
// periph_module_reset(PERIPH_MODEM_RPA_MODULE);
return 0;
}
static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2)
{
ESP_LOGE(NIMBLE_PORT_LOG_TAG, "BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
@ -544,8 +575,17 @@ void controller_sleep_deinit(void)
}
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2
void periph_module_etm_active()
{
/*This part for esp32h2 beta2*/
REG_SET_BIT(SYSTEM_MODCLK_CONF_REG, SYSTEM_ETM_CLK_SEL | SYSTEM_ETM_CLK_ACTIVE ); //Active ETM clock
}
#endif
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
{
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_FAIL;
@ -591,7 +631,12 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
/* Initialize default event queue */
ble_npl_eventq_init(nimble_port_get_dflt_eventq());
#endif
periph_module_enable(PERIPH_BT_MODULE);
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2
// only use for esp32h2 beta2
periph_module_etm_active();
#endif
// init phy
esp_phy_enable();

@ -1 +1 @@
Subproject commit 4956cf810cc7ef32fab78d814ce1e531e71967da
Subproject commit 841644b836dc74844651a8221978719e5f06f0e2

View File

@ -570,7 +570,7 @@ config BT_NIMBLE_MAX_PERIODIC_SYNCS
config BT_NIMBLE_MAX_PERIODIC_ADVERTISER_LIST
int "Maximum number of periodic advertiser list"
depends on BT_NIMBLE_50_FEATURE_SUPPORT && IDF_TARGET_ESP32C2
depends on BT_NIMBLE_50_FEATURE_SUPPORT && (IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2)
range 1 5
default 5 if BT_NIMBLE_50_FEATURE_SUPPORT
help

View File

@ -8,6 +8,7 @@
#include "esp_heap_caps.h"
#include "sdkconfig.h"
#include "esp_nimble_mem.h"
#include "nimble/nimble_port.h"
#include "host/ble_hs.h"
static TaskHandle_t host_task_h;
@ -19,6 +20,21 @@ static struct ble_npl_eventq g_eventq_dflt;
static struct ble_npl_sem ble_hs_stop_sem;
static struct ble_npl_event ble_hs_ev_stop;
/**
* Called when the host stop procedure has completed.
*/
static void
ble_hs_stop_cb(int status, void *arg)
{
ble_npl_sem_release(&ble_hs_stop_sem);
}
static void
nimble_port_stop_cb(struct ble_npl_event *ev)
{
ble_npl_sem_release(&ble_hs_stop_sem);
}
esp_err_t esp_nimble_init(void)
{
#if !SOC_ESP_NIMBLE_CONTROLLER
@ -63,11 +79,11 @@ esp_err_t esp_nimble_disable(void)
ble_npl_sem_init(&ble_hs_stop_sem, 0);
/* Initiate a host stop procedure. */
rc = ble_hs_stop(&stop_listener, ble_hs_stop_cb,
err = ble_hs_stop(&stop_listener, ble_hs_stop_cb,
NULL);
if (rc != 0) {
if (err != 0) {
ble_npl_sem_deinit(&ble_hs_stop_sem);
return rc;
return err;
}
/* Wait till the host stop procedure is complete */

View File

@ -53,67 +53,67 @@ extern "C" {
#if defined(CONFIG_BT_LE_MAX_PERIODIC_ADVERTISER_LIST)
#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST (CONFIG_BT_LE_MAX_PERIODIC_ADVERTISER_LIST)
#else
#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST (0)
#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST (5)
#endif
#if defined(CONFIG_BT_LE_MAX_PERIODIC_SYNCS)
#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS (CONFIG_BT_LE_MAX_PERIODIC_SYNCS)
#else
#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS (0)
#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS (1)
#endif
#if defined(CONFIG_BT_LE_MAX_CONNECTIONS)
#define DEFAULT_BT_LE_MAX_CONNECTIONS (CONFIG_BT_LE_MAX_CONNECTIONS)
#else
#define DEFAULT_BT_LE_MAX_CONNECTIONS (0)
#define DEFAULT_BT_LE_MAX_CONNECTIONS (2)
#endif
#if defined(CONFIG_BT_LE_ACL_BUF_SIZE)
#define DEFAULT_BT_LE_ACL_BUF_SIZE (CONFIG_BT_LE_ACL_BUF_SIZE)
#else
#define DEFAULT_BT_LE_ACL_BUF_SIZE (0)
#define DEFAULT_BT_LE_ACL_BUF_SIZE (255)
#endif
#if defined(CONFIG_BT_LE_ACL_BUF_COUNT)
#define DEFAULT_BT_LE_ACL_BUF_COUNT (CONFIG_BT_LE_ACL_BUF_COUNT)
#else
#define DEFAULT_BT_LE_ACL_BUF_COUNT (0)
#define DEFAULT_BT_LE_ACL_BUF_COUNT (24)
#endif
#if defined(CONFIG_BT_LE_HCI_EVT_BUF_SIZE)
#define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE (CONFIG_BT_LE_HCI_EVT_BUF_SIZE)
#else
#define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE (0)
#define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE (70)
#endif
#if defined(CONFIG_BT_LE_EXT_ADV_MAX_SIZE)
#define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE (CONFIG_BT_LE_EXT_ADV_MAX_SIZE)
#else
#define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE (0)
#define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE (31)
#endif
#if defined(CONFIG_BT_LE_MAX_EXT_ADV_INSTANCES)
#define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES (CONFIG_BT_LE_MAX_EXT_ADV_INSTANCES)
#else
#define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES (0)
#define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES (1)
#endif
#if defined(CONFIG_BT_LE_WHITELIST_SIZE)
#define DEFAULT_BT_NIMBLE_WHITELIST_SIZE (CONFIG_BT_LE_WHITELIST_SIZE)
#else
#define DEFAULT_BT_NIMBLE_WHITELIST_SIZE (0)
#define DEFAULT_BT_NIMBLE_WHITELIST_SIZE (12)
#endif
#if defined(CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT)
#define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT (CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT)
#else
#define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT (0)
#define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT (30)
#endif
#if defined(CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT)
#define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT)
#else
#define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (0)
#define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (8)
#endif
#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF

View File

@ -118,10 +118,13 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
*/
esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type);
#define CONFIG_VERSION 0x02109228
#define CONFIG_MAGIC 0x5A5AA5A5
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1
#define CONFIG_VERSION 0x20220409
#define CONFIG_MAGIC 0x5A5AA5A5
#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2
#define CONFIG_VERSION 0x20211021
#define CONFIG_MAGIC 0x5A5AA5A5
#endif
/**
* @brief Controller config options, depend on config mask.
* Config mask indicate which functions enabled, this means
@ -170,8 +173,16 @@ typedef struct {
uint8_t ble_hci_uart_uart_parity;
uint8_t enable_tx_cca;
uint8_t cca_rssi_thresh;
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1
uint8_t cca_drop_mode;
int8_t cca_low_tx_pwr;
#endif
uint8_t sleep_en;
uint8_t coex_phy_coded_tx_rx_time_limit;
uint8_t dis_scan_backoff;
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1
uint8_t scan_classify_filter_enable;
#endif
uint32_t config_magic;
} esp_bt_controller_config_t;

View File

@ -10,6 +10,7 @@
#include <stdint.h>
#include <stdbool.h>
#include "esp_err.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
@ -53,67 +54,67 @@ extern "C" {
#if defined(CONFIG_BT_LE_MAX_PERIODIC_ADVERTISER_LIST)
#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST (CONFIG_BT_LE_MAX_PERIODIC_ADVERTISER_LIST)
#else
#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST (0)
#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST (5)
#endif
#if defined(CONFIG_BT_LE_MAX_PERIODIC_SYNCS)
#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS (CONFIG_BT_LE_MAX_PERIODIC_SYNCS)
#else
#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS (0)
#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS (1)
#endif
#if defined(CONFIG_BT_LE_MAX_CONNECTIONS)
#define DEFAULT_BT_LE_MAX_CONNECTIONS (CONFIG_BT_LE_MAX_CONNECTIONS)
#else
#define DEFAULT_BT_LE_MAX_CONNECTIONS (0)
#define DEFAULT_BT_LE_MAX_CONNECTIONS (2)
#endif
#if defined(CONFIG_BT_LE_ACL_BUF_SIZE)
#define DEFAULT_BT_LE_ACL_BUF_SIZE (CONFIG_BT_LE_ACL_BUF_SIZE)
#else
#define DEFAULT_BT_LE_ACL_BUF_SIZE (0)
#define DEFAULT_BT_LE_ACL_BUF_SIZE (255)
#endif
#if defined(CONFIG_BT_LE_ACL_BUF_COUNT)
#define DEFAULT_BT_LE_ACL_BUF_COUNT (CONFIG_BT_LE_ACL_BUF_COUNT)
#else
#define DEFAULT_BT_LE_ACL_BUF_COUNT (0)
#define DEFAULT_BT_LE_ACL_BUF_COUNT (24)
#endif
#if defined(CONFIG_BT_LE_HCI_EVT_BUF_SIZE)
#define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE (CONFIG_BT_LE_HCI_EVT_BUF_SIZE)
#else
#define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE (0)
#define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE (70)
#endif
#if defined(CONFIG_BT_LE_EXT_ADV_MAX_SIZE)
#define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE (CONFIG_BT_LE_EXT_ADV_MAX_SIZE)
#else
#define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE (0)
#define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE (31)
#endif
#if defined(CONFIG_BT_LE_MAX_EXT_ADV_INSTANCES)
#define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES (CONFIG_BT_LE_MAX_EXT_ADV_INSTANCES)
#else
#define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES (0)
#define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES (1)
#endif
#if defined(CONFIG_BT_LE_WHITELIST_SIZE)
#define DEFAULT_BT_NIMBLE_WHITELIST_SIZE (CONFIG_BT_LE_WHITELIST_SIZE)
#else
#define DEFAULT_BT_NIMBLE_WHITELIST_SIZE (0)
#define DEFAULT_BT_NIMBLE_WHITELIST_SIZE (12)
#endif
#if defined(CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT)
#define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT (CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT)
#else
#define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT (0)
#define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT (30)
#endif
#if defined(CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT)
#define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT)
#else
#define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (0)
#define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (8)
#endif
#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF
@ -192,7 +193,15 @@ extern "C" {
#define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N (3000)
#if CONFIG_RTC_CLK_SRC_EXT_CRYS
#define RTC_FREQ_N (32768) /* in Hz */
#else
#define RTC_FREQ_N (32000) /* in Hz */
#if CONFIG_RTC_CLK_SRC_EXT_OSC || CONFIG_RTC_CLK_SRC_INT_RC32K
#pragma message "RTC clock source may not available"
#endif
#endif
#define BLE_LL_TX_PWR_DBM_N (0)

View File

@ -65,6 +65,8 @@ static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
return SYSTEM_CRYPTO_DS_CLK_EN;
case PERIPH_TEMPSENSOR_MODULE:
return SYSTEM_TSENS_CLK_EN;
case PERIPH_ETM_MODULE:
return SYSTEM_ETM_CLK_EN;
default:
return 0;
}
@ -138,6 +140,8 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
}
case PERIPH_DS_MODULE:
return SYSTEM_CRYPTO_DS_RST;
case PERIPH_ETM_MODULE:
return SYSTEM_ETM_RST;
default:
return 0;
}
@ -154,9 +158,10 @@ static uint32_t periph_ll_get_clk_en_reg(periph_module_t periph)
case PERIPH_ECC_MODULE:
case PERIPH_GDMA_MODULE:
case PERIPH_TEMPSENSOR_MODULE:
case PERIPH_ETM_MODULE:
return SYSTEM_PERIP_CLK_EN1_REG;
case PERIPH_BT_MODULE:
return SYSTEM_MODEM_CLK_EN_REG;
return SYSTEM_MODEM_CLK_EN_REG;
default:
return SYSTEM_PERIP_CLK_EN0_REG;
}
@ -173,9 +178,10 @@ static uint32_t periph_ll_get_rst_en_reg(periph_module_t periph)
case PERIPH_ECC_MODULE:
case PERIPH_GDMA_MODULE:
case PERIPH_TEMPSENSOR_MODULE:
case PERIPH_ETM_MODULE:
return SYSTEM_PERIP_RST_EN1_REG;
case PERIPH_BT_MODULE:
return SYSTEM_MODEM_RST_EN_REG;
return SYSTEM_MODEM_RST_EN_REG;
default:
return SYSTEM_PERIP_RST_EN0_REG;
}

View File

@ -40,6 +40,7 @@ typedef enum {
PERIPH_SYSTIMER_MODULE,
PERIPH_SARADC_MODULE,
PERIPH_TEMPSENSOR_MODULE,
PERIPH_ETM_MODULE,
PERIPH_MODULE_MAX
} periph_module_t;