Merge branch 'bugfix/wrong_dma_bus_use' into 'master'

bugfix(driver): fix wrong DMA bus usage See merge request espressif/esp-idf!26569
2025-03-09 17:19:09 -04:00 · 2023-10-23 12:16:34 +08:00 · 2023-10-23 12:16:34 +08:00 · 78937173cd
commit 78937173cd
parent 57e03f05e3 df2c62d270
8 changed files with 32 additions and 43 deletions
--- a/components/driver/include/esp_private/spi_common_internal.h
+++ b/components/driver/include/esp_private/spi_common_internal.h
@ -46,12 +46,19 @@ extern "C"
 #define BUS_LOCK_DEBUG_EXECUTE_CHECK(x)
 #endif

-#if SOC_GPSPI_SUPPORTED && (SOC_GDMA_TRIG_PERIPH_SPI2_BUS == SOC_GDMA_BUS_AXI)
-#define DMA_DESC_MEM_ALIGN_SIZE 8
-typedef dma_descriptor_align8_t spi_dma_desc_t;
-#else
+#if !defined(SOC_GDMA_TRIG_PERIPH_SPI2_BUS)
 #define DMA_DESC_MEM_ALIGN_SIZE 4
 typedef dma_descriptor_align4_t spi_dma_desc_t;
+#else
+#if defined(SOC_GDMA_BUS_AXI) && (SOC_GDMA_TRIG_PERIPH_SPI2_BUS == SOC_GDMA_BUS_AXI)
+#define DMA_DESC_MEM_ALIGN_SIZE  8
+#define SPI_GDMA_NEW_CHANNEL     gdma_new_axi_channel
+typedef dma_descriptor_align8_t spi_dma_desc_t;
+#elif defined(SOC_GDMA_BUS_AHB) && (SOC_GDMA_TRIG_PERIPH_SPI2_BUS == SOC_GDMA_BUS_AHB)
+#define DMA_DESC_MEM_ALIGN_SIZE 4
+#define SPI_GDMA_NEW_CHANNEL    gdma_new_ahb_channel
+typedef dma_descriptor_align4_t spi_dma_desc_t;
+#endif
 #endif

 struct spi_bus_lock_t;
--- a/components/driver/parlio/parlio_private.h
+++ b/components/driver/parlio/parlio_private.h
@ -9,6 +9,7 @@
 #include "sdkconfig.h"
 #include "freertos/FreeRTOS.h"
 #include "soc/soc_caps.h"
+#include "soc/gdma_channel.h"
 #include "hal/parlio_types.h"
 #include "hal/parlio_hal.h"
 #include "hal/parlio_ll.h"
@ -38,12 +39,17 @@
 #define PARLIO_INTR_ALLOC_FLAG   (ESP_INTR_FLAG_LOWMED | PARLIO_INTR_ALLOC_FLAG_SHARED)
 #endif

-#if SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS == SOC_GDMA_BUS_AXI
-/* The parlio peripheral uses DMA via AXI bus, which requires the descriptor aligned with 8 */
-typedef dma_descriptor_align8_t parlio_dma_desc_t;
-#else
-typedef dma_descriptor_align4_t parlio_dma_desc_t;
+#if defined(SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS) // Parlio uses GDMA
+#if defined(SOC_GDMA_BUS_AHB) && (SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS == SOC_GDMA_BUS_AHB)
+typedef dma_descriptor_align4_t     parlio_dma_desc_t;
+#define PARLIO_DMA_DESC_ALIGNMENT   4
+#define PARLIO_GDMA_NEW_CHANNEL     gdma_new_ahb_channel
+#elif defined(SOC_GDMA_BUS_AXI) && (SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS == SOC_GDMA_BUS_AXI)
+typedef dma_descriptor_align8_t     parlio_dma_desc_t;
+#define PARLIO_DMA_DESC_ALIGNMENT   8
+#define PARLIO_GDMA_NEW_CHANNEL     gdma_new_axi_channel
 #endif
+#endif // defined(SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS)

 #ifdef CACHE_LL_L2MEM_NON_CACHE_ADDR
 /* The descriptor address can be mapped by a fixed offset */
@ -52,14 +58,6 @@ typedef dma_descriptor_align4_t parlio_dma_desc_t;
 #define PARLIO_GET_NON_CACHED_DESC_ADDR(desc)   (desc)
 #endif // CACHE_LL_L2MEM_NON_CACHE_ADDR

-#if SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS == SOC_GDMA_BUS_AXI
-#define PARLIO_DMA_DESC_ALIGNMENT   8
-#define PARLIO_DMA_DESC_SIZE        8
-#else
-#define PARLIO_DMA_DESC_ALIGNMENT   4
-#define PARLIO_DMA_DESC_SIZE        sizeof(parlio_dma_desc_t)
-#endif
-
 #if SOC_PERIPH_CLK_CTRL_SHARED
 #define PARLIO_CLOCK_SRC_ATOMIC() PERIPH_RCC_ATOMIC()
 #else
--- a/components/driver/parlio/parlio_tx.c
+++ b/components/driver/parlio/parlio_tx.c
@ -219,11 +219,7 @@ static esp_err_t parlio_tx_unit_init_dma(parlio_tx_unit_t *tx_unit)
    gdma_channel_alloc_config_t dma_chan_config = {
        .direction = GDMA_CHANNEL_DIRECTION_TX,
    };
-#if SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS == SOC_GDMA_BUS_AHB
-    ESP_RETURN_ON_ERROR(gdma_new_ahb_channel(&dma_chan_config, &tx_unit->dma_chan), TAG, "allocate TX DMA channel failed");
-#elif SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS == SOC_GDMA_BUS_AXI
-    ESP_RETURN_ON_ERROR(gdma_new_axi_channel(&dma_chan_config, &tx_unit->dma_chan), TAG, "allocate TX DMA channel failed");
-#endif
+    ESP_RETURN_ON_ERROR(PARLIO_GDMA_NEW_CHANNEL(&dma_chan_config, &tx_unit->dma_chan), TAG, "allocate TX DMA channel failed");
    gdma_connect(tx_unit->dma_chan, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_PARLIO, 0));
    gdma_strategy_config_t gdma_strategy_conf = {
        .auto_update_desc = true,
@ -315,7 +311,7 @@ esp_err_t parlio_new_tx_unit(const parlio_tx_unit_config_t *config, parlio_tx_un
    size_t dma_nodes_num = config->max_transfer_size / DMA_DESCRIPTOR_BUFFER_MAX_SIZE + 1;
    // DMA descriptors must be placed in internal SRAM

-    unit->dma_nodes = heap_caps_aligned_calloc(PARLIO_DMA_DESC_ALIGNMENT, dma_nodes_num, PARLIO_DMA_DESC_SIZE, MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA);
+    unit->dma_nodes = heap_caps_aligned_calloc(PARLIO_DMA_DESC_ALIGNMENT, dma_nodes_num, sizeof(parlio_dma_desc_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA);
    ESP_GOTO_ON_FALSE(unit->dma_nodes, ESP_ERR_NO_MEM, err, TAG, "no memory for DMA nodes");
    // Link the descriptors
    for (int i = 0; i < dma_nodes_num; i++) {
--- a/components/driver/rmt/rmt_private.h
+++ b/components/driver/rmt/rmt_private.h
@ -55,12 +55,9 @@ extern "C" {
 #define RMT_PM_LOCK_NAME_LEN_MAX              16
 #define RMT_GROUP_INTR_PRIORITY_UNINITIALIZED (-1)

-#if SOC_GDMA_TRIG_PERIPH_RMT0_BUS == SOC_GDMA_BUS_AHB
-#define RMT_DMA_DESC_ALIGN 32
+// RMT is a slow peripheral, it only supports AHB-GDMA
+#define RMT_DMA_DESC_ALIGN      4
 typedef dma_descriptor_align4_t rmt_dma_descriptor_t;
-#else
-#error "Unsupported RMT DMA bus"
-#endif

 #ifdef CACHE_LL_L2MEM_NON_CACHE_ADDR
 #define RMT_GET_NON_CACHE_ADDR(addr) ((addr) ? CACHE_LL_L2MEM_NON_CACHE_ADDR(addr) : 0)
--- a/components/driver/rmt/rmt_rx.c
+++ b/components/driver/rmt/rmt_rx.c
@ -76,9 +76,7 @@ static esp_err_t rmt_rx_init_dma_link(rmt_rx_channel_t *rx_channel, const rmt_rx
    gdma_channel_alloc_config_t dma_chan_config = {
        .direction = GDMA_CHANNEL_DIRECTION_RX,
    };
-#if SOC_GDMA_TRIG_PERIPH_RMT0_BUS == SOC_GDMA_BUS_AHB
    ESP_RETURN_ON_ERROR(gdma_new_ahb_channel(&dma_chan_config, &rx_channel->base.dma_chan), TAG, "allocate RX DMA channel failed");
-#endif
    gdma_rx_event_callbacks_t cbs = {
        .on_recv_eof = rmt_dma_rx_eof_cb,
    };
--- a/components/driver/rmt/rmt_tx.c
+++ b/components/driver/rmt/rmt_tx.c
@ -47,7 +47,7 @@ static bool rmt_dma_tx_eof_cb(gdma_channel_handle_t dma_chan, gdma_event_data_t
 static esp_err_t rmt_tx_init_dma_link(rmt_tx_channel_t *tx_channel, const rmt_tx_channel_config_t *config)
 {
    rmt_symbol_word_t *dma_mem_base = heap_caps_calloc(1, sizeof(rmt_symbol_word_t) * config->mem_block_symbols,
-                                      RMT_MEM_ALLOC_CAPS | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL);
+                                                       RMT_MEM_ALLOC_CAPS | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL);
    ESP_RETURN_ON_FALSE(dma_mem_base, ESP_ERR_NO_MEM, TAG, "no mem for tx DMA buffer");
    tx_channel->base.dma_mem_base = dma_mem_base;
    for (int i = 0; i < RMT_DMA_NODES_PING_PONG; i++) {
@ -63,9 +63,7 @@ static esp_err_t rmt_tx_init_dma_link(rmt_tx_channel_t *tx_channel, const rmt_tx
    gdma_channel_alloc_config_t dma_chan_config = {
        .direction = GDMA_CHANNEL_DIRECTION_TX,
    };
-#if SOC_GDMA_TRIG_PERIPH_RMT0_BUS == SOC_GDMA_BUS_AHB
    ESP_RETURN_ON_ERROR(gdma_new_ahb_channel(&dma_chan_config, &tx_channel->base.dma_chan), TAG, "allocate TX DMA channel failed");
-#endif
    gdma_tx_event_callbacks_t cbs = {
        .on_trans_eof = rmt_dma_tx_eof_cb,
    };
--- a/components/driver/spi/gpspi/spi_common.c
+++ b/components/driver/spi/gpspi/spi_common.c
@ -246,11 +246,6 @@ static esp_err_t alloc_dma_chan(spi_host_device_t host_id, spi_dma_chan_t dma_ch

 #else //SOC_GDMA_SUPPORTED

-#if (SOC_GDMA_TRIG_PERIPH_SPI2_BUS == SOC_GDMA_BUS_AHB)
-static esp_err_t (*spi_gdma_chan_allocator)(const gdma_channel_alloc_config_t *, gdma_channel_handle_t *) = gdma_new_ahb_channel;
-#elif (SOC_GDMA_TRIG_PERIPH_SPI2_BUS == SOC_GDMA_BUS_AXI)
-static esp_err_t (*spi_gdma_chan_allocator)(const gdma_channel_alloc_config_t *, gdma_channel_handle_t *) = gdma_new_axi_channel;
-#endif
 static esp_err_t alloc_dma_chan(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
 {
    assert(is_valid_host(host_id));
@ -264,13 +259,13 @@ static esp_err_t alloc_dma_chan(spi_host_device_t host_id, spi_dma_chan_t dma_ch
            .flags.reserve_sibling = 1,
            .direction = GDMA_CHANNEL_DIRECTION_TX,
        };
-        ESP_RETURN_ON_ERROR(spi_gdma_chan_allocator(&tx_alloc_config, &ctx->tx_channel), SPI_TAG, "alloc gdma tx failed");
+        ESP_RETURN_ON_ERROR(SPI_GDMA_NEW_CHANNEL(&tx_alloc_config, &ctx->tx_channel), SPI_TAG, "alloc gdma tx failed");

        gdma_channel_alloc_config_t rx_alloc_config = {
            .direction = GDMA_CHANNEL_DIRECTION_RX,
            .sibling_chan = ctx->tx_channel,
        };
-        ESP_RETURN_ON_ERROR(spi_gdma_chan_allocator(&rx_alloc_config, &ctx->rx_channel), SPI_TAG, "alloc gdma rx failed");
+        ESP_RETURN_ON_ERROR(SPI_GDMA_NEW_CHANNEL(&rx_alloc_config, &ctx->rx_channel), SPI_TAG, "alloc gdma rx failed");

        if (host_id == SPI2_HOST) {
            gdma_connect(ctx->rx_channel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 2));
--- a/components/hal/include/hal/spi_hal.h
+++ b/components/hal/include/hal/spi_hal.h
@ -40,10 +40,10 @@ extern "C" {

 #if SOC_GPSPI_SUPPORTED

-#if SOC_GPSPI_SUPPORTED && (SOC_GDMA_TRIG_PERIPH_SPI2_BUS == SOC_GDMA_BUS_AXI)
-typedef dma_descriptor_align8_t spi_dma_desc_t;
-#else
+#if SOC_GDMA_TRIG_PERIPH_SPI2_BUS == SOC_GDMA_BUS_AHB
 typedef dma_descriptor_align4_t spi_dma_desc_t;
+#else
+typedef dma_descriptor_align8_t spi_dma_desc_t;
 #endif

 /**