mirror of
https://github.com/espressif/esp-idf
synced 2025-03-09 17:19:09 -04:00
feat(spi_flash): Add config for adding auto check status after suspend to improve performance
This commit is contained in:
parent
c4bb6a3970
commit
82b3f5413c
@ -18,7 +18,7 @@
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#include <sys/param.h> // For MIN/MAX
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#include <stdbool.h>
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#include <string.h>
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#include "hal/misc.h"
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#include "soc/spi_periph.h"
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#include "hal/spi_types.h"
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#include "hal/spi_flash_types.h"
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@ -144,7 +144,7 @@ static inline void spimem_flash_ll_auto_resume_init(spi_mem_dev_t *dev, bool aut
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*/
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static inline void spimem_flash_ll_suspend_cmd_setup(spi_mem_dev_t *dev, uint32_t sus_cmd)
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{
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dev->flash_sus_cmd.flash_pes_command = sus_cmd;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_sus_cmd, flash_pes_command, sus_cmd);
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}
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/**
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@ -156,7 +156,7 @@ static inline void spimem_flash_ll_suspend_cmd_setup(spi_mem_dev_t *dev, uint32_
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*/
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static inline void spimem_flash_ll_resume_cmd_setup(spi_mem_dev_t *dev, uint32_t res_cmd)
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{
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dev->flash_sus_cmd.flash_per_command = res_cmd;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_sus_cmd, flash_per_command, res_cmd);
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}
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/**
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@ -168,7 +168,7 @@ static inline void spimem_flash_ll_resume_cmd_setup(spi_mem_dev_t *dev, uint32_t
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*/
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static inline void spimem_flash_ll_rd_sus_cmd_setup(spi_mem_dev_t *dev, uint32_t pesr_cmd)
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{
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dev->flash_sus_cmd.wait_pesr_command = pesr_cmd;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_sus_cmd, wait_pesr_command, pesr_cmd);
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}
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/**
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@ -205,7 +205,7 @@ static inline void spimem_flash_ll_res_check_sus_setup(spi_mem_dev_t *dev, bool
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static inline void spimem_flash_ll_set_read_sus_status(spi_mem_dev_t *dev, uint32_t sus_conf)
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{
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dev->flash_sus_ctrl.frd_sus_2b = 0;
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dev->flash_sus_ctrl.pesr_end_msk = sus_conf;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_sus_ctrl, pesr_end_msk, sus_conf);
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}
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/**
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@ -236,13 +236,14 @@ static inline void spimem_flash_set_cs_hold_delay(spi_mem_dev_t *dev, uint32_t c
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* Initialize auto wait idle mode
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*
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* @param dev Beginning address of the peripheral registers.
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* @param auto_waiti Enable/disable auto wait-idle function
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* @param per_waiti Enable wait-idle with time delay function after resume.
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* @param pes_waiti Enable wait-idle with time delay function after suspend.
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*/
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool auto_waiti)
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool per_waiti, bool pes_waiti)
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{
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dev->flash_waiti_ctrl.waiti_cmd = 0x05;
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dev->flash_sus_ctrl.flash_per_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = auto_waiti;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_waiti_ctrl, waiti_cmd, 0x05);
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dev->flash_sus_ctrl.flash_per_wait_en = per_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = pes_waiti;
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}
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/**
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@ -518,11 +519,8 @@ static inline void spimem_flash_ll_set_mosi_bitlen(spi_mem_dev_t *dev, uint32_t
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static inline void spimem_flash_ll_set_command(spi_mem_dev_t *dev, uint32_t command, uint32_t bitlen)
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{
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dev->user.usr_command = 1;
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typeof(dev->user2) user2 = {
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.usr_command_value = command,
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.usr_command_bitlen = (bitlen - 1),
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};
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dev->user2.val = user2.val;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_value, command);
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_bitlen, (bitlen - 1));
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}
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/**
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@ -238,13 +238,14 @@ static inline void spimem_flash_set_cs_hold_delay(spi_mem_dev_t *dev, uint32_t c
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* Initialize auto wait idle mode
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*
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* @param dev Beginning address of the peripheral registers.
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* @param auto_waiti Enable/disable auto wait-idle function
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* @param per_waiti Enable wait-idle with time delay function after resume.
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* @param pes_waiti Enable wait-idle with time delay function after suspend.
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*/
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool auto_waiti)
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool per_waiti, bool pes_waiti)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_waiti_ctrl, waiti_cmd, 0x05);
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dev->flash_sus_ctrl.flash_per_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_per_wait_en = per_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = pes_waiti;
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}
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/**
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@ -520,11 +521,8 @@ static inline void spimem_flash_ll_set_mosi_bitlen(spi_mem_dev_t *dev, uint32_t
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static inline void spimem_flash_ll_set_command(spi_mem_dev_t *dev, uint32_t command, uint32_t bitlen)
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{
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dev->user.usr_command = 1;
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typeof(dev->user2) user2 = {
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.usr_command_value = command,
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.usr_command_bitlen = (bitlen - 1),
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};
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dev->user2.val = user2.val;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_value, command);
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_bitlen, (bitlen - 1));
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}
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/**
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@ -243,13 +243,14 @@ static inline void spimem_flash_set_cs_hold_delay(spi_mem_dev_t *dev, uint32_t c
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* Initialize auto wait idle mode
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*
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* @param dev Beginning address of the peripheral registers.
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* @param auto_waiti Enable/disable auto wait-idle function
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* @param per_waiti Enable wait-idle with time delay function after resume.
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* @param pes_waiti Enable wait-idle with time delay function after suspend.
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*/
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool auto_waiti)
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool per_waiti, bool pes_waiti)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_waiti_ctrl, waiti_cmd, 0x05);
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dev->flash_sus_ctrl.flash_per_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_per_wait_en = per_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = pes_waiti;
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}
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/**
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@ -530,11 +531,8 @@ static inline void spimem_flash_ll_set_mosi_bitlen(spi_mem_dev_t *dev, uint32_t
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static inline void spimem_flash_ll_set_command(spi_mem_dev_t *dev, uint32_t command, uint32_t bitlen)
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{
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dev->user.usr_command = 1;
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typeof(dev->user2) user2 = {
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.usr_command_value = command,
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.usr_command_bitlen = (bitlen - 1),
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};
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dev->user2.val = user2.val;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_value, command);
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_bitlen, (bitlen - 1));
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}
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/**
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@ -239,13 +239,14 @@ static inline void spimem_flash_set_cs_hold_delay(spi_mem_dev_t *dev, uint32_t c
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* Initialize auto wait idle mode
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*
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* @param dev Beginning address of the peripheral registers.
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* @param auto_waiti Enable/disable auto wait-idle function
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* @param per_waiti Enable wait-idle with time delay function after resume.
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* @param pes_waiti Enable wait-idle with time delay function after suspend.
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*/
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool auto_waiti)
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool per_waiti, bool pes_waiti)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_waiti_ctrl, waiti_cmd, 0x05);
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dev->flash_sus_ctrl.flash_per_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_per_wait_en = per_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = pes_waiti;
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}
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/**
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@ -521,11 +522,8 @@ static inline void spimem_flash_ll_set_mosi_bitlen(spi_mem_dev_t *dev, uint32_t
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static inline void spimem_flash_ll_set_command(spi_mem_dev_t *dev, uint32_t command, uint32_t bitlen)
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{
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dev->user.usr_command = 1;
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typeof(dev->user2) user2 = {
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.usr_command_value = command,
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.usr_command_bitlen = (bitlen - 1),
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};
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dev->user2.val = user2.val;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_value, command);
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_bitlen, (bitlen - 1));
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}
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/**
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@ -561,7 +559,7 @@ static inline void spimem_flash_ll_set_addr_bitlen(spi_mem_dev_t *dev, uint32_t
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static inline void spimem_flash_ll_set_extra_address(spi_mem_dev_t *dev, uint32_t extra_addr)
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{
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dev->cache_fctrl.usr_addr_4byte = 0;
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dev->rd_status.wb_mode = extra_addr;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->rd_status, wb_mode, extra_addr);
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}
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/**
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@ -242,13 +242,14 @@ static inline void spimem_flash_set_cs_hold_delay(spi_mem_dev_t *dev, uint32_t c
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* Initialize auto wait idle mode
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*
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* @param dev Beginning address of the peripheral registers.
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* @param auto_waiti Enable/disable auto wait-idle function
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* @param per_waiti Enable wait-idle with time delay function after resume.
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* @param pes_waiti Enable wait-idle with time delay function after suspend.
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*/
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool auto_waiti)
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool per_waiti, bool pes_waiti)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_waiti_ctrl, waiti_cmd, 0x05);
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dev->flash_sus_ctrl.flash_per_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_per_wait_en = per_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = pes_waiti;
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}
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/**
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@ -523,11 +524,8 @@ static inline void spimem_flash_ll_set_mosi_bitlen(spi_mem_dev_t *dev, uint32_t
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static inline void spimem_flash_ll_set_command(spi_mem_dev_t *dev, uint32_t command, uint32_t bitlen)
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{
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dev->user.usr_command = 1;
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typeof(dev->user2) user2 = {
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.usr_command_value = command,
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.usr_command_bitlen = (bitlen - 1),
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};
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dev->user2.val = user2.val;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_value, command);
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_bitlen, (bitlen - 1));
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}
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/**
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@ -563,7 +561,7 @@ static inline void spimem_flash_ll_set_addr_bitlen(spi_mem_dev_t *dev, uint32_t
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static inline void spimem_flash_ll_set_extra_address(spi_mem_dev_t *dev, uint32_t extra_addr)
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{
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dev->cache_fctrl.cache_usr_addr_4byte = 0;
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dev->rd_status.wb_mode = extra_addr;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->rd_status, wb_mode, extra_addr);
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}
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/**
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@ -240,13 +240,14 @@ static inline void spimem_flash_set_cs_hold_delay(spi_mem_dev_t *dev, uint32_t c
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* Initialize auto wait idle mode
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*
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* @param dev Beginning address of the peripheral registers.
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* @param auto_waiti Enable/disable auto wait-idle function
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* @param per_waiti Enable wait-idle with time delay function after resume.
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* @param pes_waiti Enable wait-idle with time delay function after suspend.
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*/
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool auto_waiti)
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool per_waiti, bool pes_waiti)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_waiti_ctrl, waiti_cmd, 0x05);
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dev->flash_sus_ctrl.flash_per_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_per_wait_en = per_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = pes_waiti;
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}
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/**
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@ -542,11 +543,8 @@ static inline void spimem_flash_ll_set_mosi_bitlen(spi_mem_dev_t *dev, uint32_t
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static inline void spimem_flash_ll_set_command(spi_mem_dev_t *dev, uint32_t command, uint32_t bitlen)
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{
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dev->user.usr_command = 1;
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typeof(dev->user2) user2 = {
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.usr_command_value = command,
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.usr_command_bitlen = (bitlen - 1),
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};
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dev->user2.val = user2.val;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_value, command);
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_bitlen, (bitlen - 1));
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}
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/**
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@ -582,7 +580,7 @@ static inline void spimem_flash_ll_set_addr_bitlen(spi_mem_dev_t *dev, uint32_t
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static inline void spimem_flash_ll_set_extra_address(spi_mem_dev_t *dev, uint32_t extra_addr)
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{
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dev->cache_fctrl.usr_addr_4byte = 0;
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dev->rd_status.wb_mode = extra_addr;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->rd_status, wb_mode, extra_addr);
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}
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/**
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@ -245,13 +245,14 @@ static inline void spimem_flash_set_cs_hold_delay(spi_mem_dev_t *dev, uint32_t c
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* Initialize auto wait idle mode
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*
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* @param dev Beginning address of the peripheral registers.
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* @param auto_waiti Enable/disable auto wait-idle function
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* @param per_waiti Enable wait-idle with time delay function after resume.
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* @param pes_waiti Enable wait-idle with time delay function after suspend.
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*/
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool auto_waiti)
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool per_waiti, bool pes_waiti)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_waiti_ctrl, waiti_cmd, 0x05);
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dev->flash_sus_ctrl.flash_per_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = auto_waiti;
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dev->flash_sus_ctrl.flash_per_wait_en = per_waiti;
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dev->flash_sus_ctrl.flash_pes_wait_en = pes_waiti;
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}
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/**
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@ -531,11 +532,8 @@ static inline void spimem_flash_ll_set_mosi_bitlen(spi_mem_dev_t *dev, uint32_t
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static inline void spimem_flash_ll_set_command(spi_mem_dev_t *dev, uint32_t command, uint32_t bitlen)
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{
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dev->user.usr_command = 1;
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typeof(dev->user2) user2 = {
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.usr_command_value = command,
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.usr_command_bitlen = (bitlen - 1),
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};
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dev->user2.val = user2.val;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_value, command);
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_bitlen, (bitlen - 1));
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}
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/**
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@ -209,12 +209,13 @@ static inline void spimem_flash_ll_res_check_sus_setup(spi_mem_dev_t *dev, bool
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* Initialize auto wait idle mode
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*
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* @param dev Beginning address of the peripheral registers.
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* @param auto_waiti Enable/disable auto wait-idle function
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* @param per_waiti Enable wait-idle with time delay function after resume.
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* @param pes_waiti Enable wait-idle with time delay function after suspend.
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*/
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool auto_waiti)
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static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool per_waiti, bool pes_waiti)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_waiti_ctrl, waiti_cmd, 0x05); // Set the command to send, to fetch flash status reg value.
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dev->flash_waiti_ctrl.waiti_en = auto_waiti; // enable auto wait-idle function.
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_waiti_ctrl, waiti_cmd, 0x05);
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dev->flash_waiti_ctrl.waiti_en = (per_waiti | pes_waiti); // enable auto wait-idle function.
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}
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/**
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@ -460,11 +461,8 @@ static inline void spimem_flash_ll_set_mosi_bitlen(spi_mem_dev_t *dev, uint32_t
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static inline void spimem_flash_ll_set_command(spi_mem_dev_t *dev, uint32_t command, uint32_t bitlen)
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{
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dev->user.usr_command = 1;
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typeof(dev->user2) user2 = {
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.usr_command_value = command,
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.usr_command_bitlen = (bitlen - 1),
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||||
};
|
||||
dev->user2.val = user2.val;
|
||||
HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_value, command);
|
||||
HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_bitlen, (bitlen - 1));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -264,14 +264,15 @@ static inline uint32_t spimem_flash_ll_get_tsus_unit_in_cycles(spi_mem_dev_t *de
|
||||
* Initialize auto wait idle mode
|
||||
*
|
||||
* @param dev Beginning address of the peripheral registers.
|
||||
* @param auto_waiti Enable/disable auto wait-idle function
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||||
* @param per_waiti Enable wait-idle with time delay function after resume.
|
||||
* @param pes_waiti Enable wait-idle with time delay function after suspend.
|
||||
*/
|
||||
static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool auto_waiti)
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||||
static inline void spimem_flash_ll_auto_wait_idle_init(spi_mem_dev_t *dev, bool per_waiti, bool pes_waiti)
|
||||
{
|
||||
HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_waiti_ctrl, waiti_cmd, 0x05); // Set the command to send, to fetch flash status reg value.
|
||||
dev->flash_waiti_ctrl.waiti_en = auto_waiti; // enable auto wait-idle function.
|
||||
dev->flash_sus_cmd.flash_per_wait_en = 1;
|
||||
dev->flash_sus_cmd.flash_pes_wait_en = 1;
|
||||
HAL_FORCE_MODIFY_U32_REG_FIELD(dev->flash_waiti_ctrl, waiti_cmd, 0x05);
|
||||
dev->flash_waiti_ctrl.waiti_en = (per_waiti | pes_waiti); // enable auto wait-idle function.
|
||||
dev->flash_sus_cmd.flash_per_wait_en = per_waiti;
|
||||
dev->flash_sus_cmd.flash_pes_wait_en = pes_waiti;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -538,11 +539,8 @@ static inline void spimem_flash_ll_set_mosi_bitlen(spi_mem_dev_t *dev, uint32_t
|
||||
static inline void spimem_flash_ll_set_command(spi_mem_dev_t *dev, uint32_t command, uint32_t bitlen)
|
||||
{
|
||||
dev->user.usr_command = 1;
|
||||
typeof(dev->user2) user2 = {
|
||||
.usr_command_value = command,
|
||||
.usr_command_bitlen = (bitlen - 1),
|
||||
};
|
||||
dev->user2.val = user2.val;
|
||||
HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_value, command);
|
||||
HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_bitlen, (bitlen - 1));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -57,6 +57,7 @@ typedef struct {
|
||||
#define SPI_FLASH_HOST_CONTEXT_SLICER_FLAG_DTR BIT(0) ///< Slice data according to DTR mode, the address and length must be even (A0=0).
|
||||
int freq_mhz; /// Flash clock frequency.
|
||||
uint8_t tsus_val; ///< Tsus value of suspend (us)
|
||||
bool auto_waiti_pes; ///< True for auto-wait idle after suspend command. False for using time delay.
|
||||
} spi_flash_hal_context_t;
|
||||
ESP_STATIC_ASSERT(sizeof(spi_flash_hal_context_t) == 48, "size of spi_flash_hal_context_t incorrect. Please check data compatibility with the ROM");
|
||||
|
||||
@ -90,7 +91,8 @@ typedef struct {
|
||||
esp_flash_io_mode_t default_io_mode; ///< Default flash io mode.
|
||||
int freq_mhz; ///< SPI flash clock speed (MHZ).
|
||||
int clock_src_freq; ///< SPI flash clock source (MHZ).
|
||||
uint8_t tsus_val; ///< Tsus value of suspend (us)
|
||||
uint8_t tsus_val; ///< Tsus value of suspend (us).
|
||||
bool auto_waiti_pes; ///< True for auto-wait idle after suspend command. False for using time delay.
|
||||
} spi_flash_hal_config_t;
|
||||
|
||||
/**
|
||||
|
@ -130,6 +130,7 @@ esp_err_t spi_flash_hal_init(spi_flash_hal_context_t *data_out, const spi_flash_
|
||||
data_out->flags |= SPI_FLASH_HOST_CONTEXT_FLAG_AUTO_SUSPEND;
|
||||
data_out->flags |= SPI_FLASH_HOST_CONTEXT_FLAG_AUTO_RESUME;
|
||||
data_out->tsus_val = cfg->tsus_val;
|
||||
data_out->auto_waiti_pes = cfg->auto_waiti_pes;
|
||||
}
|
||||
|
||||
#if CONFIG_SPI_FLASH_SOFTWARE_RESUME
|
||||
|
@ -145,7 +145,8 @@ void spi_flash_hal_setup_auto_suspend_mode(spi_flash_host_inst_t *host)
|
||||
{
|
||||
spi_mem_dev_t *dev = (spi_mem_dev_t*)spi_flash_ll_get_hw(SPI1_HOST);
|
||||
spi_flash_hal_context_t* ctx = (spi_flash_hal_context_t*)host;
|
||||
spimem_flash_ll_auto_wait_idle_init(dev, true);
|
||||
bool pes_waiti_delay = ctx->auto_waiti_pes ? false : true;
|
||||
spimem_flash_ll_auto_wait_idle_init(dev, true, pes_waiti_delay);
|
||||
if (ctx->freq_mhz == 120) {
|
||||
spimem_flash_ll_set_wait_idle_dummy_phase(dev, ctx->extra_dummy);
|
||||
}
|
||||
@ -172,7 +173,7 @@ void spi_flash_hal_setup_auto_resume_mode(spi_flash_host_inst_t *host)
|
||||
void spi_flash_hal_disable_auto_suspend_mode(spi_flash_host_inst_t *host)
|
||||
{
|
||||
spi_mem_dev_t *dev = (spi_mem_dev_t *)spi_flash_ll_get_hw(SPI1_HOST);
|
||||
spimem_flash_ll_auto_wait_idle_init(dev, false);
|
||||
spimem_flash_ll_auto_wait_idle_init(dev, false, false);
|
||||
spimem_flash_ll_auto_suspend_init(dev, false);
|
||||
#if SOC_SPI_MEM_SUPPORT_CHECK_SUS
|
||||
spimem_flash_ll_sus_check_sus_setup(dev, false);
|
||||
|
@ -143,6 +143,17 @@ menu "Main Flash configuration"
|
||||
task can suspend the erase/program operation. When this option is enabled, task
|
||||
scheduler is disabled, only interrupt can suspend erase/program operation.
|
||||
|
||||
config SPI_FLASH_AUTO_CHECK_SUSPEND_STATUS
|
||||
bool "Check flash status automatically after flash suspend"
|
||||
default n
|
||||
depends on SPI_FLASH_AUTO_SUSPEND
|
||||
help
|
||||
Majority flash supports to use flash register to judge if flash suspend status is
|
||||
done or not. So enable this config, the behavior would use flash register WIP bit to judge
|
||||
whether suspend is valid instead of waiting for a specific long time, which can save a
|
||||
lot of time and benefit for performance improvement.
|
||||
|
||||
|
||||
endmenu
|
||||
endmenu
|
||||
|
||||
|
@ -386,6 +386,10 @@ esp_err_t esp_flash_init_default_chip(void)
|
||||
cfg.tsus_val = TSUS_VAL_SUSPEND;
|
||||
#endif // CONFIG_SPI_FLASH_AUTO_SUSPEND
|
||||
|
||||
#if CONFIG_SPI_FLASH_AUTO_CHECK_SUSPEND_STATUS
|
||||
cfg.auto_waiti_pes = true;
|
||||
#endif
|
||||
|
||||
//the host is already initialized, only do init for the data and load it to the host
|
||||
esp_err_t err = memspi_host_init_pointers(&esp_flash_default_host, &cfg);
|
||||
if (err != ESP_OK) {
|
||||
|
@ -10,3 +10,8 @@ set(COMPONENTS main esptool_py)
|
||||
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
|
||||
|
||||
project(test_esp_flash_drv)
|
||||
|
||||
message(STATUS "Checking memspi registers are not read-write by half-word")
|
||||
include($ENV{IDF_PATH}/tools/ci/check_register_rw_half_word.cmake)
|
||||
check_register_rw_half_word(SOC_MODULES "spi_mem*" "spi1_mem*"
|
||||
HAL_MODULES "spimem_flash")
|
||||
|
Loading…
x
Reference in New Issue
Block a user