test(bootloader_support): enable analog super wdt reset for the ESP32-C61

components/bootloader_support/src/esp32c61/bootloader_soc.c

@@ -11,9 +11,9 @@
 #include "hal/regi2c_ctrl.h"
 #include "soc/regi2c_saradc.h"
 
-//Not supported but common bootloader calls the function. Do nothing
 void bootloader_ana_clock_glitch_reset_config(bool enable)
 {
+    // TODO: IDF-9274
     (void)enable;
 }
 

components/bootloader_support/test_apps/.build-test-rules.yml

@@ -4,7 +4,3 @@ components/bootloader_support/test_apps/rtc_custom_section:
   enable:
     - if: SOC_RTC_MEM_SUPPORTED == 1
       reason: this feature is supported on chips that have RTC memory
-  disable:
-    - if: IDF_TARGET == "esp32c61"
-      temporary: true
-      reason: IDF-9260