mirror of
https://github.com/espressif/esp-idf
synced 2025-03-09 17:19:09 -04:00
change(esp_hw_support/sleep): improve esp32c3 systimer stall bug workaround
This commit is contained in:
parent
cb4d647d0c
commit
941193fc03
@ -141,18 +141,6 @@ menu "Hardware Settings"
|
|||||||
make use of the internal ones.
|
make use of the internal ones.
|
||||||
endmenu
|
endmenu
|
||||||
|
|
||||||
menu "ESP_SLEEP_WORKAROUND"
|
|
||||||
# No visible menu/configs for workaround
|
|
||||||
visible if 0
|
|
||||||
config ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
|
|
||||||
bool "ESP32C3 SYSTIMER Stall Issue Workaround"
|
|
||||||
depends on IDF_TARGET_ESP32C3
|
|
||||||
help
|
|
||||||
Its not able to stall ESP32C3 systimer in sleep.
|
|
||||||
To fix related RTOS TICK issue, select it to disable related systimer during sleep.
|
|
||||||
TODO: IDF-7036
|
|
||||||
endmenu
|
|
||||||
|
|
||||||
menu "RTC Clock Config"
|
menu "RTC Clock Config"
|
||||||
orsource "./port/$IDF_TARGET/Kconfig.rtc"
|
orsource "./port/$IDF_TARGET/Kconfig.rtc"
|
||||||
|
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*/
|
*/
|
||||||
@ -24,7 +24,7 @@
|
|||||||
#include "soc/regi2c_dig_reg.h"
|
#include "soc/regi2c_dig_reg.h"
|
||||||
#include "soc/regi2c_lp_bias.h"
|
#include "soc/regi2c_lp_bias.h"
|
||||||
#include "hal/efuse_hal.h"
|
#include "hal/efuse_hal.h"
|
||||||
#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
|
#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
|
||||||
#include "soc/systimer_reg.h"
|
#include "soc/systimer_reg.h"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@ -257,17 +257,6 @@ void rtc_sleep_set_wakeup_time(uint64_t t)
|
|||||||
WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32);
|
WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32);
|
||||||
}
|
}
|
||||||
|
|
||||||
#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
|
|
||||||
void rtc_sleep_systimer_enable(bool en)
|
|
||||||
{
|
|
||||||
if (en) {
|
|
||||||
REG_SET_BIT(SYSTIMER_CONF_REG, SYSTIMER_TIMER_UNIT1_WORK_EN);
|
|
||||||
} else {
|
|
||||||
REG_CLR_BIT(SYSTIMER_CONF_REG, SYSTIMER_TIMER_UNIT1_WORK_EN);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
static uint32_t rtc_sleep_finish(uint32_t lslp_mem_inf_fpu);
|
static uint32_t rtc_sleep_finish(uint32_t lslp_mem_inf_fpu);
|
||||||
|
|
||||||
uint32_t rtc_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu)
|
uint32_t rtc_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu)
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
|
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*/
|
*/
|
||||||
@ -25,6 +25,10 @@
|
|||||||
#include "driver/rtc_io.h"
|
#include "driver/rtc_io.h"
|
||||||
#include "hal/rtc_io_hal.h"
|
#include "hal/rtc_io_hal.h"
|
||||||
|
|
||||||
|
#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
|
||||||
|
#include "hal/systimer_ll.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
#include "driver/uart.h"
|
#include "driver/uart.h"
|
||||||
|
|
||||||
#include "soc/rtc.h"
|
#include "soc/rtc.h"
|
||||||
@ -546,11 +550,6 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
|
|||||||
timer_wakeup_prepare();
|
timer_wakeup_prepare();
|
||||||
}
|
}
|
||||||
|
|
||||||
#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
|
|
||||||
if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
|
|
||||||
rtc_sleep_systimer_enable(false);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
uint32_t result;
|
uint32_t result;
|
||||||
if (deep_sleep) {
|
if (deep_sleep) {
|
||||||
@ -582,18 +581,26 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
|
|||||||
#endif
|
#endif
|
||||||
#endif // SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
|
#endif // SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
|
||||||
} else {
|
} else {
|
||||||
|
#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
|
||||||
|
if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
|
||||||
|
for (uint32_t counter_id = 0; counter_id < SOC_SYSTIMER_COUNTER_NUM; ++counter_id) {
|
||||||
|
systimer_ll_enable_counter(&SYSTIMER, counter_id, false);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
/* Wait cache idle in cache suspend to avoid cache load wrong data after spi io isolation */
|
/* Wait cache idle in cache suspend to avoid cache load wrong data after spi io isolation */
|
||||||
cache_hal_suspend(CACHE_TYPE_ALL);
|
cache_hal_suspend(CACHE_TYPE_ALL);
|
||||||
result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu);
|
result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu);
|
||||||
/* Resume cache for continue running */
|
/* Resume cache for continue running */
|
||||||
cache_hal_resume(CACHE_TYPE_ALL);
|
cache_hal_resume(CACHE_TYPE_ALL);
|
||||||
}
|
#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
|
||||||
|
if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
|
||||||
#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
|
for (uint32_t counter_id = 0; counter_id < SOC_SYSTIMER_COUNTER_NUM; ++counter_id) {
|
||||||
if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
|
systimer_ll_enable_counter(&SYSTIMER, counter_id, true);
|
||||||
rtc_sleep_systimer_enable(true);
|
}
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
// Restore CPU frequency
|
// Restore CPU frequency
|
||||||
rtc_clk_cpu_freq_set_config(&cpu_freq_config);
|
rtc_clk_cpu_freq_set_config(&cpu_freq_config);
|
||||||
|
@ -133,6 +133,10 @@ esp_err_t esp_timer_impl_early_init(void)
|
|||||||
systimer_hal_select_alarm_mode(&systimer_hal, SYSTIMER_LL_ALARM_CLOCK, SYSTIMER_ALARM_MODE_ONESHOT);
|
systimer_hal_select_alarm_mode(&systimer_hal, SYSTIMER_LL_ALARM_CLOCK, SYSTIMER_ALARM_MODE_ONESHOT);
|
||||||
systimer_hal_connect_alarm_counter(&systimer_hal, SYSTIMER_LL_ALARM_CLOCK, SYSTIMER_LL_COUNTER_CLOCK);
|
systimer_hal_connect_alarm_counter(&systimer_hal, SYSTIMER_LL_ALARM_CLOCK, SYSTIMER_LL_COUNTER_CLOCK);
|
||||||
|
|
||||||
|
for (unsigned cpuid = 0; cpuid < SOC_CPU_CORES_NUM; ++cpuid) {
|
||||||
|
systimer_hal_counter_can_stall_by_cpu(&systimer_hal, SYSTIMER_LL_COUNTER_CLOCK, cpuid, (cpuid < portNUM_PROCESSORS) ? true : false);
|
||||||
|
}
|
||||||
|
|
||||||
return ESP_OK;
|
return ESP_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -483,6 +483,10 @@ config SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256
|
|||||||
bool
|
bool
|
||||||
default y
|
default y
|
||||||
|
|
||||||
|
config SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
|
||||||
|
bool
|
||||||
|
default y
|
||||||
|
|
||||||
config SOC_RTCIO_PIN_COUNT
|
config SOC_RTCIO_PIN_COUNT
|
||||||
int
|
int
|
||||||
default 0
|
default 0
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*/
|
*/
|
||||||
@ -658,18 +658,6 @@ void rtc_sleep_low_init(uint32_t slowclk_period);
|
|||||||
*/
|
*/
|
||||||
void rtc_sleep_set_wakeup_time(uint64_t t);
|
void rtc_sleep_set_wakeup_time(uint64_t t);
|
||||||
|
|
||||||
#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
|
|
||||||
/**
|
|
||||||
* @brief Configure systimer for esp32c3 systimer stall issue workaround
|
|
||||||
*
|
|
||||||
* This function configures related systimer for esp32c3 systimer stall issue.
|
|
||||||
* Only apply workaround when xtal powered up.
|
|
||||||
*
|
|
||||||
* @param en enable systimer or not
|
|
||||||
*/
|
|
||||||
void rtc_sleep_systimer_enable(bool en);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define RTC_GPIO_TRIG_EN BIT(2) //!< GPIO wakeup
|
#define RTC_GPIO_TRIG_EN BIT(2) //!< GPIO wakeup
|
||||||
#define RTC_TIMER_TRIG_EN BIT(3) //!< Timer wakeup
|
#define RTC_TIMER_TRIG_EN BIT(3) //!< Timer wakeup
|
||||||
#define RTC_WIFI_TRIG_EN BIT(5) //!< WIFI wakeup (light sleep only)
|
#define RTC_WIFI_TRIG_EN BIT(5) //!< WIFI wakeup (light sleep only)
|
||||||
|
@ -224,6 +224,8 @@
|
|||||||
|
|
||||||
#define SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256 (1)
|
#define SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256 (1)
|
||||||
|
|
||||||
|
#define SOC_SLEEP_SYSTIMER_STALL_WORKAROUND (1)
|
||||||
|
|
||||||
/*-------------------------- RTCIO CAPS --------------------------------------*/
|
/*-------------------------- RTCIO CAPS --------------------------------------*/
|
||||||
/* No dedicated RTCIO subsystem on ESP32-C3. RTC functions are still supported
|
/* No dedicated RTCIO subsystem on ESP32-C3. RTC functions are still supported
|
||||||
* for hold, wake & 32kHz crystal functions - via rtc_cntl_reg */
|
* for hold, wake & 32kHz crystal functions - via rtc_cntl_reg */
|
||||||
|
Loading…
x
Reference in New Issue
Block a user