blackbeard420/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf synced 2025-03-09 09:09:10 -04:00
Code Issues Projects Releases Wiki Activity

Merge branch 'bugfix/bugfix/gpio_cant_hold_v4.3' into 'release/v4.3'

Browse Source 
gpio: fix issue that gpio cannot hold during deep-sleep on c3 (backport v4.3)

See merge request espressif/esp-idf!15358
This commit is contained in:
Cao Sen Miao 2021-10-11 02:30:22 +00:00
commit a05d4e9e86
2 changed files with 23 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
components/hal/esp32c3/include/hal/gpio_ll.h
View File

@ -334,6 +334,7 @@ static inline void gpio_ll_get_drive_capability(gpio_dev_t *hw, gpio_num_t gpio_
*/ */
static inline void gpio_ll_deep_sleep_hold_en(gpio_dev_t *hw) static inline void gpio_ll_deep_sleep_hold_en(gpio_dev_t *hw)
{ {
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD);
SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M); SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M);
} }

44
components/soc/esp32c3/gpio_periph.c
View File

@ -40,26 +40,26 @@ const uint32_t GPIO_PIN_MUX_REG[SOC_GPIO_PIN_COUNT] = {
}; };
const uint32_t GPIO_HOLD_MASK[SOC_GPIO_PIN_COUNT] = { const uint32_t GPIO_HOLD_MASK[SOC_GPIO_PIN_COUNT] = {
BIT(0), //GPIO0 BIT(0), //GPIO0
BIT(1), //GPIO1 BIT(1), //GPIO1
BIT(2), //GPIO2 BIT(2), //GPIO2
BIT(3), //GPIO3 BIT(3), //GPIO3
BIT(4), //GPIO4 BIT(4), //GPIO4
BIT(5), //GPIO5 BIT(5), //GPIO5
BIT(5), //GPIO6 BIT(6), //GPIO6
BIT(6), //GPIO7 BIT(7), //GPIO7
BIT(3), //GPIO8 BIT(8), //GPIO8
BIT(4), //GPIO9 BIT(9), //GPIO9
BIT(0), //GPIO10 BIT(10), //GPIO10
BIT(15), //GPIO11 BIT(11), //GPIO11
BIT(10), //GPIO12 BIT(12), //GPIO12
BIT(12), //GPIO13 BIT(13), //GPIO13
BIT(8), //GPIO14 BIT(14), //GPIO14
BIT(7), //GPIO15 BIT(15), //GPIO15
BIT(9), //GPIO16 BIT(16), //GPIO16
BIT(11), //GPIO17 BIT(17), //GPIO17
BIT(1), //GPIO18 BIT(18), //GPIO18
BIT(2), //GPIO19 BIT(19), //GPIO19
BIT(13), //GPIO20 BIT(20), //GPIO20
BIT(14), //GPIO21 BIT(21), //GPIO21
}; };