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fix(esp_system): deselect all modem modules clk source selection before clk init

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This commit is contained in:
wuzhenghui 2024-11-14 21:42:00 +08:00
parent af18afd279
commit a2d26ab56f
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GPG Key ID: 3EFEDECDEBA39BB9
6 changed files with 23 additions and 1 deletions
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8
components/esp_hw_support/include/esp_private/esp_modem_clock.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -107,9 +107,15 @@ void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpcl
/**
* @brief Disable lowpower clock source selection
* @param module modem module
*/
void modem_clock_deselect_lp_clock_source(periph_module_t module);
/**
* @brief Disable all modem module's lowpower clock source selection
*/
void modem_clock_deselect_all_module_lp_clock_source(void);
/**
* @brief Reset wifi mac
*/

11
components/esp_hw_support/modem_clock.c
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@ -348,6 +348,17 @@ void IRAM_ATTR modem_clock_module_disable(periph_module_t module)
modem_clock_device_disable(MODEM_CLOCK_instance(), deps);
}
void modem_clock_deselect_all_module_lp_clock_source(void)
{
#if SOC_WIFI_SUPPORTED
modem_clock_hal_deselect_all_wifi_lpclk_source(MODEM_CLOCK_instance()->hal);
#endif
#if SOC_BT_SUPPORTED
modem_clock_hal_deselect_all_ble_rtc_timer_lpclk_source(MODEM_CLOCK_instance()->hal);
#endif
modem_clock_hal_deselect_all_coex_lpclk_source(MODEM_CLOCK_instance()->hal);
}
void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpclk_src_t src, uint32_t divider)
{
assert(IS_MODEM_MODULE(module));

1
components/esp_system/port/soc/esp32c5/clk.c
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@ -82,6 +82,7 @@ __attribute__((weak)) void esp_clk_init(void)
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif
modem_clock_deselect_all_module_lp_clock_source();
#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K);
#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)

1
components/esp_system/port/soc/esp32c6/clk.c
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@ -102,6 +102,7 @@ __attribute__((weak)) void esp_clk_init(void)
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif
modem_clock_deselect_all_module_lp_clock_source();
#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K);
#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)

1
components/esp_system/port/soc/esp32c61/clk.c
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@ -69,6 +69,7 @@ __attribute__((weak)) void esp_clk_init(void)
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif
modem_clock_deselect_all_module_lp_clock_source();
#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K);
#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)

2
components/esp_system/port/soc/esp32h2/clk.c
View File

@ -43,6 +43,7 @@
#include "hal/temperature_sensor_ll.h"
#include "hal/usb_serial_jtag_ll.h"
#include "esp_private/periph_ctrl.h"
#include "esp_private/esp_modem_clock.h"
#include "esp_private/esp_clk.h"
#include "esp_private/esp_pmu.h"
#include "esp_rom_uart.h"
@ -101,6 +102,7 @@ __attribute__((weak)) void esp_clk_init(void)
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif
modem_clock_deselect_all_module_lp_clock_source();
#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K);
#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)