From a70fe8bdee4eec8765ac486387eeaa056413b9dc Mon Sep 17 00:00:00 2001
From: wuzhenghui <wuzhenghui@espressif.com>
Date: Fri, 11 Oct 2024 15:38:20 +0800
Subject: [PATCH] change(esp_hw_support): switch hp_sys default power mode
with clock src selection
---
.../esp_hw_support/port/esp32c6/pmu_sleep.c | 5 ----
.../port/esp32c6/private_include/pmu_param.h | 4 ++--
.../esp_hw_support/port/esp32p4/pmu_sleep.c | 23 ++++++++++++++-----
.../port/esp32p4/private_include/pmu_param.h | 11 +++++++--
.../port/esp32p4/rtc_clk_init.c | 7 ++----
5 files changed, 30 insertions(+), 20 deletions(-)
diff --git a/components/esp_hw_support/port/esp32c6/pmu_sleep.c b/components/esp_hw_support/port/esp32c6/pmu_sleep.c
index a50e7bec68..5418af227b 100644
--- a/components/esp_hw_support/port/esp32c6/pmu_sleep.c
+++ b/components/esp_hw_support/port/esp32c6/pmu_sleep.c
@@ -201,11 +201,6 @@ const pmu_sleep_config_t* pmu_sleep_config_default(
{
pmu_sleep_power_config_t power_default = PMU_SLEEP_POWER_CONFIG_DEFAULT(pd_flags);
- uint32_t iram_pd_flags = 0;
- iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G0) ? BIT(0) : 0;
- iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G1) ? BIT(1) : 0;
- iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G2) ? BIT(2) : 0;
- iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G3) ? BIT(3) : 0;
config->power = power_default;
pmu_sleep_param_config_t param_default = PMU_SLEEP_PARAM_CONFIG_DEFAULT(pd_flags);
diff --git a/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h b/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h
index aad6f976ba..fdef78b330 100644
--- a/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h
+++ b/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h
@@ -365,8 +365,8 @@ typedef struct {
#define PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags) { \
.hp_sys = { \
.analog = { \
- .pd_cur = PMU_PD_CUR_SLEEP_ON, \
- .bias_sleep = PMU_BIASSLP_SLEEP_ON, \
+ .pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \
+ .bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \
.xpd = PMU_HP_XPD_DEEPSLEEP, \
.dbg_atten = PMU_DBG_HP_DEEPSLEEP \
} \
diff --git a/components/esp_hw_support/port/esp32p4/pmu_sleep.c b/components/esp_hw_support/port/esp32p4/pmu_sleep.c
index 4beed8a3cb..e285bde363 100644
--- a/components/esp_hw_support/port/esp32p4/pmu_sleep.c
+++ b/components/esp_hw_support/port/esp32p4/pmu_sleep.c
@@ -147,12 +147,6 @@ const pmu_sleep_config_t* pmu_sleep_config_default(
{
pmu_sleep_power_config_t power_default = PMU_SLEEP_POWER_CONFIG_DEFAULT(pd_flags);
- uint32_t iram_pd_flags = 0;
- iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G0) ? BIT(0) : 0;
- iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G1) ? BIT(1) : 0;
- iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G2) ? BIT(2) : 0;
- iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G3) ? BIT(3) : 0;
-
if (dslp) {
config->param.lp_sys.analog_wait_target_cycle = rtc_time_us_to_slowclk(PMU_LP_ANALOG_WAIT_TARGET_TIME_DSLP_US, slowclk_period);
@@ -173,6 +167,23 @@ const pmu_sleep_config_t* pmu_sleep_config_default(
analog_default.lp_sys[PMU_MODE_LP_SLEEP].analog.pd_cur = 0;
#endif
+ if (!(pd_flags & PMU_SLEEP_PD_XTAL))
+ {
+ // Analog parameters in HP_SLEEP
+ analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON;
+ analog_default.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON;
+ analog_default.hp_sys.analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT;
+ analog_default.hp_sys.analog.dbias = HP_CALI_ACTIVE_DBIAS_DEFAULT;
+
+ // Analog parameters in LP_SLEEP
+ analog_default.lp_sys[LP(SLEEP)].analog.pd_cur = PMU_PD_CUR_SLEEP_ON;
+ analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = PMU_BIASSLP_SLEEP_ON;
+ analog_default.lp_sys[LP(SLEEP)].analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT;
+#if !CONFIG_ESP_SLEEP_KEEP_DCDC_ALWAYS_ON
+ analog_default.lp_sys[LP(SLEEP)].analog.dbias = LP_CALI_DBIAS;
+#endif
+ }
+
#if CONFIG_ESP_SLEEP_KEEP_DCDC_ALWAYS_ON
power_default.hp_sys.dig_power.dcdc_switch_pd_en = 0;
analog_default.hp_sys.analog.dcm_vset = CONFIG_ESP_SLEEP_DCM_VSET_VAL_IN_SLEEP;
diff --git a/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h b/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h
index 0d2bb42bf6..dccfd53291 100644
--- a/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h
+++ b/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h
@@ -16,6 +16,10 @@
extern "C" {
#endif
+#define HP_CALI_ACTIVE_DCM_VSET_DEFAULT 27 // For DCDC, about 1.25v
+#define HP_CALI_ACTIVE_DBIAS_DEFAULT 24 // For HP regulator
+#define LP_CALI_DBIAS 29 // For LP regulator
+
// FOR XTAL FORCE PU IN SLEEP
#define PMU_PD_CUR_SLEEP_ON 0
#define PMU_BIASSLP_SLEEP_ON 0
@@ -36,6 +40,9 @@ extern "C" {
#define PMU_HP_DBIAS_LIGHTSLEEP_0V6 1
#define PMU_LP_DBIAS_LIGHTSLEEP_0V7 12
+// FOR LIGHTSLEEP: XTAL FORCE PU
+#define PMU_DBG_ATTEN_ACTIVE_DEFAULT 0
+
// FOR DEEPSLEEP
#define PMU_DBG_HP_DEEPSLEEP 0
#define PMU_HP_XPD_DEEPSLEEP 0
@@ -375,8 +382,8 @@ typedef struct {
#define PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags) { \
.hp_sys = { \
.analog = { \
- .pd_cur = PMU_PD_CUR_SLEEP_ON, \
- .bias_sleep = PMU_BIASSLP_SLEEP_ON, \
+ .pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \
+ .bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \
.xpd = PMU_HP_XPD_DEEPSLEEP, \
.dbg_atten = PMU_DBG_HP_DEEPSLEEP \
} \
diff --git a/components/esp_hw_support/port/esp32p4/rtc_clk_init.c b/components/esp_hw_support/port/esp32p4/rtc_clk_init.c
index 27624deb4a..00cb5f09a9 100644
--- a/components/esp_hw_support/port/esp32p4/rtc_clk_init.c
+++ b/components/esp_hw_support/port/esp32p4/rtc_clk_init.c
@@ -1,5 +1,5 @@
/*
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -27,9 +27,6 @@
static const char *TAG = "rtc_clk_init";
-static uint32_t HP_CALI_DBIAS = 27; //about 1.25v
-static uint32_t LP_CALI_DBIAS = 29; //about 1.25v
-
void rtc_clk_init(rtc_clk_config_t cfg)
{
rtc_cpu_freq_config_t old_config, new_config;
@@ -62,7 +59,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)
// Switch to DCDC
SET_PERI_REG_MASK(PMU_DCM_CTRL_REG, PMU_DCDC_ON_REQ);
CLEAR_PERI_REG_MASK(LP_SYSTEM_REG_SYS_CTRL_REG, LP_SYSTEM_REG_LP_FIB_DCDC_SWITCH); //0: enable, 1: disable
- REG_SET_FIELD(PMU_HP_ACTIVE_BIAS_REG, PMU_HP_ACTIVE_DCM_VSET, HP_CALI_DBIAS);
+ REG_SET_FIELD(PMU_HP_ACTIVE_BIAS_REG, PMU_HP_ACTIVE_DCM_VSET, HP_CALI_ACTIVE_DCM_VSET_DEFAULT);
esp_rom_delay_us(1000);
CLEAR_PERI_REG_MASK(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_HP_ACTIVE_HP_REGULATOR_XPD);