diff --git a/components/esp_hw_support/Kconfig b/components/esp_hw_support/Kconfig index dc3d5ce440..913edf8460 100644 --- a/components/esp_hw_support/Kconfig +++ b/components/esp_hw_support/Kconfig @@ -158,44 +158,6 @@ menu "Hardware Settings" so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context. endmenu - menu "MMU Config" - # This Config is used for configure the MMU. - # Be configured based on flash size selection. - # Invisible to users. - - config MMU_PAGE_SIZE_16KB - bool - default y if IDF_TARGET_ESP32C2 && ESPTOOLPY_FLASHSIZE_1MB - default n - - config MMU_PAGE_SIZE_32KB - bool - default y if IDF_TARGET_ESP32C2 && ESPTOOLPY_FLASHSIZE_2MB - default n - - config MMU_PAGE_SIZE_64KB - bool - default y if !MMU_PAGE_SIZE_32KB && !MMU_PAGE_SIZE_16KB - default n - - config MMU_PAGE_MODE - string - default "16KB" if MMU_PAGE_SIZE_16KB - default "32KB" if MMU_PAGE_SIZE_32KB - default "64KB" if MMU_PAGE_SIZE_64KB - - config MMU_PAGE_SIZE - # Some chips support different flash MMU page sizes: 64k, 32k, 16k. - # Since the number of MMU pages is limited, the maximum flash size supported - # for each page size is reduced proportionally: 4 MB, 2MB, 1MB. To make best - # use of small flash sizes (reducing the wasted space due to alignment), we - # need to use the smallest possible MMU page size for the given flash size. - hex - default 0x4000 if MMU_PAGE_SIZE_16KB - default 0x8000 if MMU_PAGE_SIZE_32KB - default 0x10000 if MMU_PAGE_SIZE_64KB - endmenu - menu "GDMA Configuration" depends on SOC_GDMA_SUPPORTED config GDMA_CTRL_FUNC_IN_IRAM diff --git a/components/esp_system/port/soc/esp32c2/Kconfig.cache b/components/esp_system/port/soc/esp32c2/Kconfig.cache index 03dd5558ad..8cffc68720 100644 --- a/components/esp_system/port/soc/esp32c2/Kconfig.cache +++ b/components/esp_system/port/soc/esp32c2/Kconfig.cache @@ -1,20 +1,5 @@ menu "Cache config" - choice ESP32C2_MMU_PAGE_SIZE - # TODO: IDF-3821 - prompt "Cache page size" - default ESP32C2_MMU_PAGE_SIZE_64KB - help - Cache page size to be set on application startup - - config ESP32C2_MMU_PAGE_SIZE_16KB - bool "16KB" - config ESP32C2_MMU_PAGE_SIZE_32KB - bool "32KB" - config ESP32C2_MMU_PAGE_SIZE_64KB - bool "64KB" - endchoice - config ESP32C2_INSTRUCTION_CACHE_WRAP # TODO: IDF-4194 bool @@ -23,11 +8,4 @@ menu "Cache config" If enabled, instruction cache will use wrap mode to read spi flash. The wrap length is fixed to 32B - - config ESP32C2_MMU_PAGE_MODE - int - default 0 if ESP32C2_MMU_PAGE_SIZE_16KB - default 1 if ESP32C2_MMU_PAGE_SIZE_32KB - default 2 if ESP32C2_MMU_PAGE_SIZE_64KB - endmenu diff --git a/components/hal/esp32c2/include/hal/cache_ll.h b/components/hal/esp32c2/include/hal/cache_ll.h index c39aa532c8..1c5d1db8fc 100644 --- a/components/hal/esp32c2/include/hal/cache_ll.h +++ b/components/hal/esp32c2/include/hal/cache_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -54,9 +54,9 @@ static inline cache_bus_mask_t cache_ll_l1_get_bus(uint32_t cache_id, uint32_t v cache_bus_mask_t mask = 0; uint32_t vaddr_end = vaddr_start + len - 1; - if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH(CONFIG_MMU_PAGE_SIZE)) { + if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH(SOC_MMU_PAGE_SIZE)) { mask |= CACHE_BUS_IBUS0; - } else if (vaddr_start >= DRAM0_CACHE_ADDRESS_LOW && vaddr_end < DRAM0_CACHE_ADDRESS_HIGH(CONFIG_MMU_PAGE_SIZE)) { + } else if (vaddr_start >= DRAM0_CACHE_ADDRESS_LOW && vaddr_end < DRAM0_CACHE_ADDRESS_HIGH(SOC_MMU_PAGE_SIZE)) { mask |= CACHE_BUS_DBUS0; } else { HAL_ASSERT(0); //Out of region diff --git a/components/hal/esp32c2/include/hal/mmu_ll.h b/components/hal/esp32c2/include/hal/mmu_ll.h index 305f1fe445..5a30ded658 100644 --- a/components/hal/esp32c2/include/hal/mmu_ll.h +++ b/components/hal/esp32c2/include/hal/mmu_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -25,7 +25,7 @@ extern "C" { * * @note Only used in this file */ -#define MMU_LL_PAGE_SIZE (CONFIG_MMU_PAGE_SIZE) +#define MMU_LL_PAGE_SIZE (SOC_MMU_PAGE_SIZE) /** * Get MMU page size diff --git a/components/hal/include/hal/mmu_hal.h b/components/hal/include/hal/mmu_hal.h index 33418d32f2..441e4fa9c5 100644 --- a/components/hal/include/hal/mmu_hal.h +++ b/components/hal/include/hal/mmu_hal.h @@ -40,7 +40,7 @@ uint32_t mmu_hal_pages_to_bytes(uint32_t mmu_id, uint32_t page_num); * @param bytes length in byte * * @return - * length in CONFIG_MMU_PAGE_SIZE + * length in SOC_MMU_PAGE_SIZE */ uint32_t mmu_hal_bytes_to_pages(uint32_t mmu_id, uint32_t bytes); @@ -54,7 +54,7 @@ uint32_t mmu_hal_bytes_to_pages(uint32_t mmu_id, uint32_t bytes); * @param len length to be mapped, in bytes * @param[out] out_len actual mapped length * - * @note vaddr and paddr should be aligned with the mmu page size, see CONFIG_MMU_PAGE_SIZE + * @note vaddr and paddr should be aligned with the mmu page size, see SOC_MMU_PAGE_SIZE */ void mmu_hal_map_region(uint32_t mmu_id, mmu_target_t mem_type, uint32_t vaddr, uint32_t paddr, uint32_t len, uint32_t *out_len); #endif diff --git a/components/soc/CMakeLists.txt b/components/soc/CMakeLists.txt index 9dacce5335..4a92a094cb 100644 --- a/components/soc/CMakeLists.txt +++ b/components/soc/CMakeLists.txt @@ -6,4 +6,9 @@ idf_component_register(SRCS "lldesc.c" idf_build_get_property(target IDF_TARGET) add_subdirectory(${target}) +# For an embedded system, the MMU page size should always be defined statically +# For IDF, we define it according to the Flash size that user selects +# Replace this value in an adaptive way, if Kconfig isn't available on your platform +target_compile_definitions(${COMPONENT_LIB} INTERFACE SOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE) + target_linker_script(${COMPONENT_LIB} INTERFACE "${target}/ld/${target}.peripherals.ld") diff --git a/components/soc/Kconfig b/components/soc/Kconfig new file mode 100644 index 0000000000..26e916a637 --- /dev/null +++ b/components/soc/Kconfig @@ -0,0 +1,45 @@ +menu "SoC Settings" + # No visible menu/configs for now + visible if 0 + + menu "MMU Config" + # This Config is used for configure the MMU. + # Be configured based on flash size selection. + # Invisible to users. + + config MMU_PAGE_SIZE_16KB + bool + default y if IDF_TARGET_ESP32C2 && ESPTOOLPY_FLASHSIZE_1MB + default n + + config MMU_PAGE_SIZE_32KB + bool + default y if IDF_TARGET_ESP32C2 && ESPTOOLPY_FLASHSIZE_2MB + default n + + config MMU_PAGE_SIZE_64KB + bool + default y if !MMU_PAGE_SIZE_32KB && !MMU_PAGE_SIZE_16KB + default n + + config MMU_PAGE_MODE + string + default "8KB" if MMU_PAGE_SIZE_8KB + default "16KB" if MMU_PAGE_SIZE_16KB + default "32KB" if MMU_PAGE_SIZE_32KB + default "64KB" if MMU_PAGE_SIZE_64KB + + config MMU_PAGE_SIZE + # Some chips support different flash MMU page sizes: 64k, 32k, 16k. + # Since the number of MMU pages is limited, the maximum flash size supported + # for each page size is reduced proportionally: 4 MB, 2MB, 1MB. To make best + # use of small flash sizes (reducing the wasted space due to alignment), we + # need to use the smallest possible MMU page size for the given flash size. + hex + default 0x2000 if MMU_PAGE_SIZE_8KB + default 0x4000 if MMU_PAGE_SIZE_16KB + default 0x8000 if MMU_PAGE_SIZE_32KB + default 0x10000 if MMU_PAGE_SIZE_64KB + endmenu + +endmenu diff --git a/components/soc/esp32c2/include/soc/ext_mem_defs.h b/components/soc/esp32c2/include/soc/ext_mem_defs.h index 9698bb5f76..5ebf6e0ab0 100644 --- a/components/soc/esp32c2/include/soc/ext_mem_defs.h +++ b/components/soc/esp32c2/include/soc/ext_mem_defs.h @@ -84,7 +84,7 @@ extern "C" { /** * Max MMU available paddr page num. - * `MMU_MAX_PADDR_PAGE_NUM * CONFIG_MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.: + * `MMU_MAX_PADDR_PAGE_NUM * SOC_MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.: * 64 * 64KB, means MMU can support 4MB paddr at most */ #define MMU_MAX_PADDR_PAGE_NUM 64 diff --git a/components/soc/esp32c3/include/soc/ext_mem_defs.h b/components/soc/esp32c3/include/soc/ext_mem_defs.h index f37567bffd..4000d6498d 100644 --- a/components/soc/esp32c3/include/soc/ext_mem_defs.h +++ b/components/soc/esp32c3/include/soc/ext_mem_defs.h @@ -81,7 +81,7 @@ extern "C" { #define MMU_VALID_VAL_MASK 0xff /** * Max MMU available paddr page num. - * `MMU_MAX_PADDR_PAGE_NUM * CONFIG_MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.: + * `MMU_MAX_PADDR_PAGE_NUM * SOC_MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.: * 256 * 64KB, means MMU can support 16MB paddr at most */ #define MMU_MAX_PADDR_PAGE_NUM 256 diff --git a/components/soc/esp32h2/include/soc/ext_mem_defs.h b/components/soc/esp32h2/include/soc/ext_mem_defs.h index 7189108f9b..b39dfa67f4 100644 --- a/components/soc/esp32h2/include/soc/ext_mem_defs.h +++ b/components/soc/esp32h2/include/soc/ext_mem_defs.h @@ -81,7 +81,7 @@ extern "C" { #define MMU_VALID_VAL_MASK 0xff /** * Max MMU available paddr page num. - * `MMU_MAX_PADDR_PAGE_NUM * CONFIG_MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.: + * `MMU_MAX_PADDR_PAGE_NUM * SOC_MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.: * 256 * 64KB, means MMU can support 16MB paddr at most */ #define MMU_MAX_PADDR_PAGE_NUM 256 diff --git a/components/soc/esp32s2/include/soc/ext_mem_defs.h b/components/soc/esp32s2/include/soc/ext_mem_defs.h index b5554d503c..1d794e022e 100644 --- a/components/soc/esp32s2/include/soc/ext_mem_defs.h +++ b/components/soc/esp32s2/include/soc/ext_mem_defs.h @@ -109,7 +109,7 @@ extern "C" { #define MMU_VALID_VAL_MASK 0x3fff /** * Max MMU available paddr page num. - * `MMU_MAX_PADDR_PAGE_NUM * CONFIG_MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.: + * `MMU_MAX_PADDR_PAGE_NUM * SOC_MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.: * 16384 * 64KB, means MMU can support 1GB paddr at most */ #define MMU_MAX_PADDR_PAGE_NUM 16384 diff --git a/components/soc/esp32s3/include/soc/ext_mem_defs.h b/components/soc/esp32s3/include/soc/ext_mem_defs.h index 9bb1d2d312..05ccf52f95 100644 --- a/components/soc/esp32s3/include/soc/ext_mem_defs.h +++ b/components/soc/esp32s3/include/soc/ext_mem_defs.h @@ -81,7 +81,7 @@ extern "C" { #define MMU_VALID_VAL_MASK 0x3fff /** * Max MMU available paddr page num. - * `MMU_MAX_PADDR_PAGE_NUM * CONFIG_MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.: + * `MMU_MAX_PADDR_PAGE_NUM * SOC_MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.: * 16384 * 64KB, means MMU can support 1GB paddr at most */ #define MMU_MAX_PADDR_PAGE_NUM 16384 diff --git a/tools/test_apps/system/g0_components/CMakeLists.txt b/tools/test_apps/system/g0_components/CMakeLists.txt index f5fd24076a..cc6ad1be01 100644 --- a/tools/test_apps/system/g0_components/CMakeLists.txt +++ b/tools/test_apps/system/g0_components/CMakeLists.txt @@ -26,12 +26,6 @@ idf_build_set_property(__BUILD_COMPONENT_DEPGRAPH_ENABLED 1) project(g0_components) -# As a workaround for ESP32-C2, we need to define the MMU page size here, until MMU hal-driver -# is refactored -if(CONFIG_IDF_TARGET_ESP32C2) - idf_build_set_property(C_COMPILE_OPTIONS "-DCONFIG_MMU_PAGE_SIZE=64" APPEND) -endif() - # Currently, only support a single core on Xtensa targets. if(CONFIG_IDF_TARGET_ARCH_XTENSA) idf_build_set_property(C_COMPILE_OPTIONS "-DportNUM_PROCESSORS=1" APPEND)