From adea6829b324d55ce8c9043f8d642af87961d8f6 Mon Sep 17 00:00:00 2001 From: Mahavir Jain Date: Thu, 20 Jun 2024 10:41:20 +0800 Subject: [PATCH] fix(hal): correct the power up sequence for MPI/ECC peripherals in ESP32-C5 --- components/hal/esp32c2/include/hal/ecc_ll.h | 3 +++ components/hal/esp32c6/include/hal/ecc_ll.h | 15 ++++++++++++++- components/hal/esp32c6/include/hal/mpi_ll.h | 4 ++++ components/hal/esp32h2/include/hal/ecc_ll.h | 15 ++++++++++++++- components/hal/esp32h2/include/hal/mpi_ll.h | 4 ++++ components/hal/esp32p4/include/hal/ecc_ll.h | 3 +++ .../hal/test_apps/crypto/main/ecc/test_ecc.c | 2 ++ .../hal/test_apps/crypto/main/ecdsa/test_ecdsa.c | 2 ++ components/mbedtls/port/ecc/esp_ecc.c | 2 ++ components/mbedtls/port/ecdsa/ecdsa_alt.c | 2 ++ 10 files changed, 50 insertions(+), 2 deletions(-) diff --git a/components/hal/esp32c2/include/hal/ecc_ll.h b/components/hal/esp32c2/include/hal/ecc_ll.h index 2fcca34ea0..58ddd82dd0 100644 --- a/components/hal/esp32c2/include/hal/ecc_ll.h +++ b/components/hal/esp32c2/include/hal/ecc_ll.h @@ -49,6 +49,9 @@ static inline void ecc_ll_reset_register(void) /// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance #define ecc_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; ecc_ll_reset_register(__VA_ARGS__) +static inline void ecc_ll_power_up(void) {} +static inline void ecc_ll_power_down(void) {} + static inline void ecc_ll_enable_interrupt(void) { REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1); diff --git a/components/hal/esp32c6/include/hal/ecc_ll.h b/components/hal/esp32c6/include/hal/ecc_ll.h index c5e8799dcf..cb8b4ca2cd 100644 --- a/components/hal/esp32c6/include/hal/ecc_ll.h +++ b/components/hal/esp32c6/include/hal/ecc_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -11,6 +11,7 @@ #include "hal/ecc_types.h" #include "soc/ecc_mult_reg.h" #include "soc/pcr_struct.h" +#include "soc/pcr_reg.h" #ifdef __cplusplus extern "C" { @@ -41,6 +42,18 @@ static inline void ecc_ll_reset_register(void) PCR.ecc_conf.ecc_rst_en = 0; } +static inline void ecc_ll_power_up(void) +{ + REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD); + REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD); +} + +static inline void ecc_ll_power_down(void) +{ + REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PU); + REG_SET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD); +} + static inline void ecc_ll_enable_interrupt(void) { REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1); diff --git a/components/hal/esp32c6/include/hal/mpi_ll.h b/components/hal/esp32c6/include/hal/mpi_ll.h index 032ac17b47..dbb0af1132 100644 --- a/components/hal/esp32c6/include/hal/mpi_ll.h +++ b/components/hal/esp32c6/include/hal/mpi_ll.h @@ -49,11 +49,15 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words) static inline void mpi_ll_clear_power_control_bit(void) { + /* Power up the MPI peripheral */ REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD); + REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PD); } static inline void mpi_ll_set_power_control_bit(void) { + /* Power down the MPI peripheral */ + REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PU); REG_SET_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD); } diff --git a/components/hal/esp32h2/include/hal/ecc_ll.h b/components/hal/esp32h2/include/hal/ecc_ll.h index 47d4e8b9e6..46667692a7 100644 --- a/components/hal/esp32h2/include/hal/ecc_ll.h +++ b/components/hal/esp32h2/include/hal/ecc_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -11,6 +11,7 @@ #include "hal/ecc_types.h" #include "soc/ecc_mult_reg.h" #include "soc/pcr_struct.h" +#include "soc/pcr_reg.h" #ifdef __cplusplus extern "C" { @@ -47,6 +48,18 @@ static inline void ecc_ll_reset_register(void) PCR.ecdsa_conf.ecdsa_rst_en = 0; } +static inline void ecc_ll_power_up(void) +{ + REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD); + REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD); +} + +static inline void ecc_ll_power_down(void) +{ + REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PU); + REG_SET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD); +} + static inline void ecc_ll_enable_interrupt(void) { REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1); diff --git a/components/hal/esp32h2/include/hal/mpi_ll.h b/components/hal/esp32h2/include/hal/mpi_ll.h index 0eed1020d9..774d2ce96a 100644 --- a/components/hal/esp32h2/include/hal/mpi_ll.h +++ b/components/hal/esp32h2/include/hal/mpi_ll.h @@ -50,11 +50,15 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words) static inline void mpi_ll_clear_power_control_bit(void) { + /* Power up the MPI peripheral */ REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD); + REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PD); } static inline void mpi_ll_set_power_control_bit(void) { + /* Power down the MPI peripheral */ + REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PU); REG_SET_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD); } diff --git a/components/hal/esp32p4/include/hal/ecc_ll.h b/components/hal/esp32p4/include/hal/ecc_ll.h index be25321fe4..bffedd2e85 100644 --- a/components/hal/esp32p4/include/hal/ecc_ll.h +++ b/components/hal/esp32p4/include/hal/ecc_ll.h @@ -57,6 +57,9 @@ static inline void ecc_ll_reset_register(void) /// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance #define ecc_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; ecc_ll_reset_register(__VA_ARGS__) +static inline void ecc_ll_power_up(void) {} +static inline void ecc_ll_power_down(void) {} + static inline void ecc_ll_enable_interrupt(void) { REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1); diff --git a/components/hal/test_apps/crypto/main/ecc/test_ecc.c b/components/hal/test_apps/crypto/main/ecc/test_ecc.c index a6bc8c3fdc..fcf72814f2 100644 --- a/components/hal/test_apps/crypto/main/ecc/test_ecc.c +++ b/components/hal/test_apps/crypto/main/ecc/test_ecc.c @@ -46,6 +46,7 @@ static void ecc_enable_and_reset(void) { ECC_RCC_ATOMIC() { ecc_ll_enable_bus_clock(true); + ecc_ll_power_up(); ecc_ll_reset_register(); } } @@ -54,6 +55,7 @@ static void ecc_disable(void) { ECC_RCC_ATOMIC() { ecc_ll_enable_bus_clock(false); + ecc_ll_power_down(); } } diff --git a/components/hal/test_apps/crypto/main/ecdsa/test_ecdsa.c b/components/hal/test_apps/crypto/main/ecdsa/test_ecdsa.c index 2772a0debc..d7abec0e55 100644 --- a/components/hal/test_apps/crypto/main/ecdsa/test_ecdsa.c +++ b/components/hal/test_apps/crypto/main/ecdsa/test_ecdsa.c @@ -32,6 +32,7 @@ static void ecdsa_enable_and_reset(void) ECC_RCC_ATOMIC() { ecc_ll_enable_bus_clock(true); + ecc_ll_power_up(); ecc_ll_reset_register(); } @@ -53,6 +54,7 @@ static void ecdsa_disable(void) ECC_RCC_ATOMIC() { ecc_ll_enable_bus_clock(false); + ecc_ll_power_down(); } ECDSA_RCC_ATOMIC() { diff --git a/components/mbedtls/port/ecc/esp_ecc.c b/components/mbedtls/port/ecc/esp_ecc.c index b9fe0a8871..0cb4e72e9c 100644 --- a/components/mbedtls/port/ecc/esp_ecc.c +++ b/components/mbedtls/port/ecc/esp_ecc.c @@ -19,6 +19,7 @@ static void esp_ecc_acquire_hardware(void) ECC_RCC_ATOMIC() { ecc_ll_enable_bus_clock(true); + ecc_ll_power_up(); ecc_ll_reset_register(); } } @@ -27,6 +28,7 @@ static void esp_ecc_release_hardware(void) { ECC_RCC_ATOMIC() { ecc_ll_enable_bus_clock(false); + ecc_ll_power_down(); } esp_crypto_ecc_lock_release(); diff --git a/components/mbedtls/port/ecdsa/ecdsa_alt.c b/components/mbedtls/port/ecdsa/ecdsa_alt.c index 0e984d1933..14aec8f5a3 100644 --- a/components/mbedtls/port/ecdsa/ecdsa_alt.c +++ b/components/mbedtls/port/ecdsa/ecdsa_alt.c @@ -35,6 +35,7 @@ static void esp_ecdsa_acquire_hardware(void) ECC_RCC_ATOMIC() { ecc_ll_enable_bus_clock(true); + ecc_ll_power_up(); ecc_ll_reset_register(); } @@ -57,6 +58,7 @@ static void esp_ecdsa_release_hardware(void) ECC_RCC_ATOMIC() { ecc_ll_enable_bus_clock(false); + ecc_ll_power_down(); } #ifdef SOC_ECDSA_USES_MPI