From b43104538bcf6259a1f5aef9cedc340b03378f1e Mon Sep 17 00:00:00 2001
From: wanlei <wanlei@espressif.com>
Date: Fri, 24 May 2024 19:38:25 +0800
Subject: [PATCH] fix(spi_master): fix spi halt when remove device who using
 rc_fast

---
 components/esp_driver_spi/src/gpspi/spi_master.c         | 9 +++++++++
 components/soc/esp32c5/beta3/include/soc/clk_tree_defs.h | 2 +-
 components/soc/esp32c6/include/soc/clk_tree_defs.h       | 2 +-
 components/soc/esp32h2/include/soc/clk_tree_defs.h       | 2 +-
 4 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/components/esp_driver_spi/src/gpspi/spi_master.c b/components/esp_driver_spi/src/gpspi/spi_master.c
index 28389e4eea..cc15803629 100644
--- a/components/esp_driver_spi/src/gpspi/spi_master.c
+++ b/components/esp_driver_spi/src/gpspi/spi_master.c
@@ -572,6 +572,15 @@ esp_err_t spi_bus_remove_device(spi_device_handle_t handle)
 
 #if SOC_SPI_SUPPORT_CLK_RC_FAST
     if (handle->cfg.clock_source == SPI_CLK_SRC_RC_FAST) {
+        // If no transactions from other device, acquire the bus to switch module clock to `SPI_CLK_SRC_DEFAULT`
+        // because `SPI_CLK_SRC_RC_FAST` will be disabled then, which block following transactions
+        if (handle->host->cur_cs == DEV_NUM_MAX) {
+            spi_device_acquire_bus(handle, portMAX_DELAY);
+            SPI_MASTER_PERI_CLOCK_ATOMIC() {
+                spi_ll_set_clk_source(handle->host->hal.hw, SPI_CLK_SRC_DEFAULT);
+            }
+            spi_device_release_bus(handle);
+        }
         periph_rtc_dig_clk8m_disable();
     }
 #endif
diff --git a/components/soc/esp32c5/beta3/include/soc/clk_tree_defs.h b/components/soc/esp32c5/beta3/include/soc/clk_tree_defs.h
index d65e8583d2..d181407c6f 100644
--- a/components/soc/esp32c5/beta3/include/soc/clk_tree_defs.h
+++ b/components/soc/esp32c5/beta3/include/soc/clk_tree_defs.h
@@ -359,7 +359,7 @@ typedef enum {  // TODO: [ESP32C5] IDF-8695 (inherit from C6)
 /**
  * @brief Array initializer for all supported clock sources of SPI
  */
-#define SOC_SPI_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST}
+#define SOC_SPI_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_XTAL}
 
 /**
  * @brief Type of SPI clock source.
diff --git a/components/soc/esp32c6/include/soc/clk_tree_defs.h b/components/soc/esp32c6/include/soc/clk_tree_defs.h
index 6ec973cd7d..e9ea966827 100644
--- a/components/soc/esp32c6/include/soc/clk_tree_defs.h
+++ b/components/soc/esp32c6/include/soc/clk_tree_defs.h
@@ -354,7 +354,7 @@ typedef enum {
 /**
  * @brief Array initializer for all supported clock sources of SPI
  */
-#define SOC_SPI_CLKS {SOC_MOD_CLK_PLL_F80M, SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST}
+#define SOC_SPI_CLKS {SOC_MOD_CLK_PLL_F80M, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_XTAL}
 
 /**
  * @brief Type of SPI clock source.
diff --git a/components/soc/esp32h2/include/soc/clk_tree_defs.h b/components/soc/esp32h2/include/soc/clk_tree_defs.h
index 4036d695a7..fb8777c80b 100644
--- a/components/soc/esp32h2/include/soc/clk_tree_defs.h
+++ b/components/soc/esp32h2/include/soc/clk_tree_defs.h
@@ -332,7 +332,7 @@ typedef enum {
 /**
  * @brief Array initializer for all supported clock sources of SPI
  */
-#define SOC_SPI_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_PLL_F48M, SOC_MOD_CLK_RC_FAST}
+#define SOC_SPI_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_PLL_F48M}
 
 /**
  * @brief Type of SPI clock source.