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doc: Add configuration information about INT & Task WDTs
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@ -25,9 +25,34 @@ for the programmer to find out, using either OpenOCD or gdbstub, what bit of cod
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disabled. Depending on the configuration of the panic handler, it can also blindly reset the CPU, which may be
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disabled. Depending on the configuration of the panic handler, it can also blindly reset the CPU, which may be
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preferred in a production environment.
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preferred in a production environment.
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The interrupt watchdog is built around the hardware watchdog in timer group 1. If this watchdog for some reason
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The interrupt watchdog is built around the hardware watchdog in timer group 1. If this watchdog for
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cannot execute the NMI handler that invokes the panic handler (e.g. because IRAM is overwritten by garbage),
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some reason cannot execute the NMI handler that invokes the panic handler (e.g. because IRAM is
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it will hard-reset the SOC.
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overwritten by garbage), it will hard-reset the SOC. If the panic handler executes, it will display
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the panic reason as "Interrupt wdt timeout on CPU0" or "Interrupt wdt timeout on CPU1" (as
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applicable).
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Configuration
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@@@@@@@@@@@@@
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The interrupt watchdog is enabled by default via the :ref:`CONFIG_ESP_INT_WDT` configuration
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flag. The timeout is configured by setting :ref:`CONFIG_ESP_INT_WDT_TIMEOUT_MS`. The default
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timeout is higher if PSRAM support is enabled, as a critical section or interrupt routine that
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accesses a large amount of PSRAM will take longer to complete in some circumstances. The INT WDT
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timeout should always be longer than the period between FreeRTOS ticks (see
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:ref:`CONFIG_FREERTOS_HZ`).
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Tuning
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@@@@@@
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If you find the Interrupt watchdog timeout is triggering because an interrupt or critical section is
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running longer than the timeout period, consider rewriting the code: critical sections should be
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made as short as possible, with non-critical computation happening outside the critical
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section. Interrupt handlers should also perform the minimum possible amount of computation, consider
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pushing data into a queue from the ISR and processing it in a task instead. Neither critical
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sections or interrupt handlers should ever block waiting for another event to occur.
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If changing the code to reduce the processing time is not possible or desirable, it's possible to
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increase the :ref:`CONFIG_ESP_INT_WDT_TIMEOUT_MS` setting instead.
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Task Watchdog Timer
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Task Watchdog Timer
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^^^^^^^^^^^^^^^^^^^
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^^^^^^^^^^^^^^^^^^^
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@ -39,14 +64,17 @@ yielding to a lower-priority task thus starving the lower priority task from
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CPU time. This can be an indicator of poorly written code that spinloops on a
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CPU time. This can be an indicator of poorly written code that spinloops on a
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peripheral, or a task that is stuck in an infinite loop.
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peripheral, or a task that is stuck in an infinite loop.
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By default the TWDT will watch the Idle Tasks of each CPU, however any task can
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{IDF_TARGET_IDLE_TASKS:default="Idle task", esp32="Idle Tasks of each CPU"}
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elect to be watched by the TWDT. Each watched task must 'reset' the TWDT
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By default the TWDT will watch the {IDF_TARGET_IDLE_TASKS}, however any task can
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subscribe to be watched by the TWDT. Each watched task must 'reset' the TWDT
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periodically to indicate that they have been allocated CPU time. If a task does
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periodically to indicate that they have been allocated CPU time. If a task does
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not reset within the TWDT timeout period, a warning will be printed with
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not reset within the TWDT timeout period, a warning will be printed with
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information about which tasks failed to reset the TWDT in time and which
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information about which tasks failed to reset the TWDT in time and which
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tasks are currently running on the {IDF_TARGET_NAME} CPUs.
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tasks are currently running.
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And also there is a possibility to redefine the function `esp_task_wdt_isr_user_handler`
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in the user code to receive this event.
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It is also possible to redefine the function `esp_task_wdt_isr_user_handler`
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in the user code, in order to receive the timeout event and handle it differently.
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The TWDT is built around the Hardware Watchdog Timer in Timer Group 0. The TWDT
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The TWDT is built around the Hardware Watchdog Timer in Timer Group 0. The TWDT
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can be initialized by calling :cpp:func:`esp_task_wdt_init` which will configure
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can be initialized by calling :cpp:func:`esp_task_wdt_init` which will configure
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@ -63,11 +91,22 @@ longer call :cpp:func:`esp_task_wdt_reset`. Once all tasks have unsubscribed
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form the TWDT, the TWDT can be deinitialized by calling
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form the TWDT, the TWDT can be deinitialized by calling
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:cpp:func:`esp_task_wdt_deinit()`.
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:cpp:func:`esp_task_wdt_deinit()`.
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By default :ref:`CONFIG_ESP_TASK_WDT` in :ref:`project-configuration-menu` be enabled causing
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The default timeout period for the TWDT is set using config item
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the TWDT to be initialized automatically during startup. Likewise
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:ref:`CONFIG_ESP_TASK_WDT_TIMEOUT_S`. This should be set to at least as long as you expect any
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:ref:`CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0` and
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single task will need to monopolise the CPU (for example, if you expect the app will do a long
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:ref:`CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1` are also enabled by default causing
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intensive calculation and should not yield to other tasks). It is also possible to change this
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the two Idle Tasks to be subscribed to the TWDT during startup.
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timeout at runtime by calling :cpp:func:`esp_task_wdt_init`.
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The following config options control TWDT configuration at startup. They are all enabled by default:
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{IDF_TARGET_IDLE_TASK:default="Idle task", esp32="CPU0 Idle task"}
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.. list::
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- :ref:`CONFIG_ESP_TASK_WDT` - the TWDT is initialized automatically during startup. If this option is disabled, it is still possible to initialize the Task WDT at runtime by calling :cpp:func:`esp_task_wdt_init`.
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- :ref:`CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0` - {IDF_TARGET_IDLE_TASK} is subscribed to the TWDT during startup. If this option is disabled, it is still possible to subscribe the idle task by calling :cpp:func:`esp_task_wdt_add` at any time.
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:esp32: - :ref:`CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1` - CPU1 Idle task is subscribed to the TWDT during startup.
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JTAG and watchdogs
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JTAG and watchdogs
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^^^^^^^^^^^^^^^^^^
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^^^^^^^^^^^^^^^^^^
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