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Merge branch 'fix/intr_alloc_level_bug_v5.4' into 'release/v5.4'
fix(esp_hw_support): fix a bug in the interrupt allocator related to shared interrupts (backport v5.4) See merge request espressif/esp-idf!35477
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@ -73,6 +73,15 @@ struct shared_vector_desc_t {
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#define VECDESC_FL_SHARED (1<<2)
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#define VECDESC_FL_NONSHARED (1<<3)
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#if SOC_CPU_HAS_FLEXIBLE_INTC
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/* On targets that have configurable interrupts levels, store the assigned level in the flags */
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#define VECDESC_FL_LEVEL_SHIFT (8)
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/* Allocate 4 bits in the flag */
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#define VECDESC_FL_LEVEL_MASK (0xf)
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/* Help to extract the level from flags */
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#define VECDESC_FL_LEVEL(flags) (((flags) >> VECDESC_FL_LEVEL_SHIFT) & VECDESC_FL_LEVEL_MASK)
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#endif
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//Pack using bitfields for better memory use
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struct vector_desc_t {
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int flags: 16; //OR of VECDESC_FL_* defines
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@ -258,7 +267,17 @@ static bool is_vect_desc_usable(vector_desc_t *vd, int flags, int cpu, int force
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return false;
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}
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#ifndef SOC_CPU_HAS_FLEXIBLE_INTC
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#if SOC_CPU_HAS_FLEXIBLE_INTC
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/* On target that have configurable interrupts levels, check if the interrupt has already
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* been allocated, and if yes, make sure the levels are compatible. */
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const int vector_lvl = VECDESC_FL_LEVEL(vd->flags);
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/* A non-zero value means the level has already been set prior to this allocation, make
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* sure the current level matches what we need. */
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if (vector_lvl != 0 && (flags & (1 << vector_lvl)) == 0) {
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ALCHLOG("....Unusable: incompatible priority");
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return false;
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}
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#else
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//Check if the interrupt priority is acceptable
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if (!(flags & (1 << intr_desc.priority))) {
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ALCHLOG("....Unusable: incompatible priority");
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@ -640,6 +659,7 @@ esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusre
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#if SOC_CPU_HAS_FLEXIBLE_INTC
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//Extract the level from the interrupt passed flags
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int level = esp_intr_flags_to_level(flags);
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vd->flags |= level << VECDESC_FL_LEVEL_SHIFT;
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esp_cpu_intr_set_priority(intr, level);
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if (flags & ESP_INTR_FLAG_EDGE) {
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@ -786,6 +806,10 @@ static esp_err_t intr_free_for_current_cpu(intr_handle_t handle)
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//we save.(We can also not use the same exit path for empty shared ints anymore if we delete
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//the desc.) For now, just mark it as free.
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handle->vector_desc->flags &= ~(VECDESC_FL_NONSHARED|VECDESC_FL_RESERVED|VECDESC_FL_SHARED);
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#if SOC_CPU_HAS_FLEXIBLE_INTC
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//Clear the assigned level
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handle->vector_desc->flags &= ~(VECDESC_FL_LEVEL_MASK << VECDESC_FL_LEVEL_SHIFT);
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#endif
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handle->vector_desc->source = ETS_INTERNAL_UNUSED_INTR_SOURCE;
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//Also kill non_iram mask bit.
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@ -798,11 +822,17 @@ static esp_err_t intr_free_for_current_cpu(intr_handle_t handle)
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int esp_intr_get_intno(intr_handle_t handle)
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{
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if (handle == NULL || handle->vector_desc == NULL) {
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return -1;
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}
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return handle->vector_desc->intno;
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}
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int esp_intr_get_cpu(intr_handle_t handle)
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{
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if (handle == NULL || handle->vector_desc == NULL) {
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return -1;
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}
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return handle->vector_desc->cpu;
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}
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@ -22,7 +22,7 @@ if(CONFIG_SOC_ETM_SUPPORTED)
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endif()
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if(CONFIG_SOC_GPTIMER_SUPPORTED)
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list(APPEND SRC "test_intr_alloc.c")
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list(APPEND srcs "test_intr_alloc.c")
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endif()
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# In order for the cases defined by `TEST_CASE` to be linked into the final elf,
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@ -66,7 +66,7 @@ static void timer_test(int flags)
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}
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if ((flags & ESP_INTR_FLAG_SHARED)) {
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/* Check that the allocated interrupts are acutally shared */
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/* Check that the allocated interrupts are actually shared */
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int intr_num = esp_intr_get_intno(inth[0]);
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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TEST_ASSERT_EQUAL(intr_num, esp_intr_get_intno(inth[i]));
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@ -124,6 +124,73 @@ void static test_isr(void*arg)
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}
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TEST_CASE("Intr_alloc test, shared interrupts don't affect level", "[intr_alloc]")
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{
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intr_handle_t handle_lvl_1;
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intr_handle_t handle_lvl_2;
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/* Allocate an interrupt of level 1 that will be shared with another source */
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esp_err_t err = esp_intr_alloc(ETS_FROM_CPU_INTR2_SOURCE,
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ESP_INTR_FLAG_LEVEL1 | ESP_INTR_FLAG_SHARED,
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test_isr, NULL, &handle_lvl_1);
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TEST_ESP_OK(err);
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/* Allocate a shared interrupt of a different level */
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err = esp_intr_alloc(ETS_FROM_CPU_INTR3_SOURCE,
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ESP_INTR_FLAG_LEVEL2 | ESP_INTR_FLAG_SHARED,
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test_isr, NULL, &handle_lvl_2);
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TEST_ESP_OK(err);
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/* Make sure the allocated CPU line is NOT the same for both sources */
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const int intlvl1 = esp_intr_get_intno(handle_lvl_1);
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const int intlvl2 = esp_intr_get_intno(handle_lvl_2);
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printf("Level 1 interrupt allocated: %d\n", intlvl1);
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printf("Level 2 interrupt allocated: %d\n", intlvl2);
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TEST_ASSERT(intlvl1 != intlvl2);
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TEST_ESP_OK(esp_intr_free(handle_lvl_1));
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TEST_ESP_OK(esp_intr_free(handle_lvl_2));
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}
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#if SOC_CPU_HAS_FLEXIBLE_INTC
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/**
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* On targets that have flexible interrupt levels, make sure that a shared interrupt sees its level
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* being cleared (and reconfigurable) uupon remove and reallocation.
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*/
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TEST_CASE("Intr_alloc test, shared interrupts custom level cleared", "[intr_alloc]")
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{
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intr_handle_t handle;
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esp_err_t err = esp_intr_alloc(ETS_FROM_CPU_INTR2_SOURCE,
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ESP_INTR_FLAG_LEVEL1 | ESP_INTR_FLAG_SHARED,
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test_isr, NULL, &handle);
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TEST_ESP_OK(err);
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const int first_intno = esp_intr_get_intno(handle);
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/* Make sure the priority is correct */
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TEST_ASSERT_EQUAL(1, esp_cpu_intr_get_priority(first_intno));
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/* Free the shared interrupt and try to reallocate it with another level */
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TEST_ESP_OK(esp_intr_free(handle));
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err = esp_intr_alloc(ETS_FROM_CPU_INTR3_SOURCE,
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ESP_INTR_FLAG_LEVEL2 | ESP_INTR_FLAG_SHARED,
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test_isr, NULL, &handle);
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TEST_ESP_OK(err);
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/* Make sure they are both the same and the level has been updated */
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const int second_intno = esp_intr_get_intno(handle);
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TEST_ASSERT_EQUAL(2, esp_cpu_intr_get_priority(second_intno));
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TEST_ASSERT(first_intno == second_intno);
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/* Delete the interrupt */
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TEST_ESP_OK(esp_intr_free(handle));
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}
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#endif
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TEST_CASE("Allocate previously freed interrupt, with different flags", "[intr_alloc]")
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{
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intr_handle_t intr;
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