mirror of
https://github.com/espressif/esp-idf
synced 2025-03-10 01:29:21 -04:00
refactor(sdmmc): place sdmmc driver into a new component
This commit is contained in:
parent
c4559198b8
commit
c7c38b7904
@ -18,7 +18,6 @@ set(includes "include"
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"parlio/include"
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"rmt/include"
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"sdio_slave/include"
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"sdmmc/include"
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"sdspi/include"
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"sigma_delta/include"
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"temperature_sensor/include"
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@ -127,12 +126,6 @@ if(CONFIG_SOC_SDIO_SLAVE_SUPPORTED)
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list(APPEND srcs "sdio_slave/sdio_slave.c")
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endif()
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# SDMMC related source files
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if(CONFIG_SOC_SDMMC_HOST_SUPPORTED)
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list(APPEND srcs "sdmmc/sdmmc_transaction.c"
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"sdmmc/sdmmc_host.c")
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endif()
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# Sigma-Delta Modulation related source files
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if(CONFIG_SOC_SDM_SUPPORTED)
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list(APPEND srcs "sigma_delta/sdm.c"
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@ -199,6 +192,7 @@ else()
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# for backward compatibility, the driver component needs to
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# have a public dependency on other "esp_driver_foo" components
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esp_driver_gpio esp_driver_pcnt esp_driver_gptimer esp_driver_spi esp_driver_mcpwm
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esp_driver_sd_common esp_driver_sdmmc
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LDFRAGMENTS ${ldfragments}
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)
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endif()
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6
components/esp_driver_sd_common/CMakeLists.txt
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6
components/esp_driver_sd_common/CMakeLists.txt
Normal file
@ -0,0 +1,6 @@
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set(srcs)
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set(public_include "include")
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idf_component_register(SRCS ${srcs}
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INCLUDE_DIRS ${public_include}
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)
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10
components/esp_driver_sd_common/README.md
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10
components/esp_driver_sd_common/README.md
Normal file
@ -0,0 +1,10 @@
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# Common Component for SD Related Drivers
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This component contains driver layer common files:
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- `esp_sd_defs.h`
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- `esp_sd_types.h`
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These files will be used by SD related drivers, including:
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- `esp_driver_sdmmc`
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- `esp_driver_sdspi`
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@ -1,24 +1,7 @@
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/*
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* SPDX-FileCopyrightText: 2006 Uwe Stuehler <uwe@openbsd.org>
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: ISC
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*
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* SPDX-FileContributor: 2016-2021 Espressif Systems (Shanghai) CO LTD
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*/
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/*
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* Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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@ -75,7 +58,6 @@ extern "C" {
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#define SD_IO_RW_DIRECT 52 /* R5 */
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#define SD_IO_RW_EXTENDED 53 /* R5 */
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/* OCR bits */
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#define MMC_OCR_MEM_READY (1<<31) /* memory power-up status bit */
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#define MMC_OCR_ACCESS_MODE_MASK 0x60000000 /* bits 30:29 */
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@ -528,7 +510,6 @@ static inline uint32_t MMC_RSP_BITS(uint32_t *src, int start, int len)
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#define CISTPL_CODE_SDIO_EXT 0x92
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#define CISTPL_CODE_END 0xFF
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/* Timing */
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#define SDMMC_TIMING_LEGACY 0
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#define SDMMC_TIMING_HIGHSPEED 1
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@ -1,24 +1,7 @@
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/*
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* SPDX-FileCopyrightText: 2006 Uwe Stuehler <uwe@openbsd.org>
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: ISC
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*
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* SPDX-FileContributor: 2016-2023 Espressif Systems (Shanghai) CO LTD
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*/
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/*
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* Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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@ -110,15 +93,15 @@ typedef struct {
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* SD/MMC command information
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*/
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typedef struct {
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uint32_t opcode; /*!< SD or MMC command index */
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uint32_t arg; /*!< SD/MMC command argument */
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sdmmc_response_t response; /*!< response buffer */
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void* data; /*!< buffer to send or read into */
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size_t datalen; /*!< length of data in the buffer */
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size_t buflen; /*!< length of the buffer */
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size_t blklen; /*!< block length */
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int flags; /*!< see below */
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/** @cond */
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uint32_t opcode; /*!< SD or MMC command index */
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uint32_t arg; /*!< SD/MMC command argument */
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sdmmc_response_t response; /*!< response buffer */
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void* data; /*!< buffer to send or read into */
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size_t datalen; /*!< length of data in the buffer */
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size_t buflen; /*!< length of the buffer */
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size_t blklen; /*!< block length */
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int flags; /*!< see below */
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/** @cond */
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#define SCF_ITSDONE 0x0001 /*!< command is complete */
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#define SCF_CMD(flags) ((flags) & 0x00f0)
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#define SCF_CMD_AC 0x0000
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@ -131,7 +114,7 @@ typedef struct {
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#define SCF_RSP_CRC 0x0400
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#define SCF_RSP_IDX 0x0800
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#define SCF_RSP_PRESENT 0x1000
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/* response types */
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/* response types */
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#define SCF_RSP_R0 0 /*!< none */
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#define SCF_RSP_R1 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
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#define SCF_RSP_R1B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
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@ -142,11 +125,11 @@ typedef struct {
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#define SCF_RSP_R5B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
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#define SCF_RSP_R6 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
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#define SCF_RSP_R7 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
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/* special flags */
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/* special flags */
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#define SCF_WAIT_BUSY 0x2000 /*!< Wait for completion of card busy signal before returning */
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/** @endcond */
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esp_err_t error; /*!< error returned from transfer */
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uint32_t timeout_ms; /*!< response timeout, in milliseconds */
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/** @endcond */
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esp_err_t error; /*!< error returned from transfer */
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uint32_t timeout_ms; /*!< response timeout, in milliseconds */
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} sdmmc_command_t;
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/**
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15
components/esp_driver_sdmmc/CMakeLists.txt
Normal file
15
components/esp_driver_sdmmc/CMakeLists.txt
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@ -0,0 +1,15 @@
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set(srcs)
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set(public_include "include")
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# SDMMC related source files
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if(CONFIG_SOC_SDMMC_HOST_SUPPORTED)
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list(APPEND srcs "src/sdmmc_transaction.c"
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"src/sdmmc_host.c")
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endif()
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idf_component_register(SRCS ${srcs}
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INCLUDE_DIRS ${public_include}
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REQUIRES
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PRIV_REQUIRES esp_timer esp_pm esp_mm esp_driver_gpio esp_driver_sd_common
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)
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@ -50,8 +50,6 @@ extern "C" {
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#define SDMMC_SLOT_NO_WP GPIO_NUM_NC ///< indicates that write protect line is not used
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#define SDMMC_SLOT_WIDTH_DEFAULT 0 ///< use the maximum possible width for the slot
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#if SOC_SDMMC_USE_IOMUX && !SOC_SDMMC_USE_GPIO_MATRIX
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/**
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* Macro defining default configuration of SDMMC host slot
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9
components/esp_driver_sdmmc/include/driver/sdmmc_defs.h
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9
components/esp_driver_sdmmc/include/driver/sdmmc_defs.h
Normal file
@ -0,0 +1,9 @@
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "driver/esp_sd_defs.h"
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@ -47,15 +47,15 @@ typedef struct {
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uint8_t width; ///< Bus width used by the slot (might be less than the max width supported)
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uint32_t flags; ///< Features used by this slot
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#define SDMMC_SLOT_FLAG_INTERNAL_PULLUP BIT(0)
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/**< Enable internal pullups on enabled pins. The internal pullups
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are insufficient however, please make sure external pullups are
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connected on the bus. This is for debug / example purpose only.
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*/
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/**< Enable internal pullups on enabled pins. The internal pullups
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are insufficient however, please make sure external pullups are
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connected on the bus. This is for debug / example purpose only.
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*/
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#define SDMMC_SLOT_FLAG_WP_ACTIVE_HIGH BIT(1)
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/**< GPIO write protect polarity.
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* 0 means "active low", i.e. card is protected when the GPIO is low;
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* 1 means "active high", i.e. card is protected when GPIO is high.
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*/
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/**< GPIO write protect polarity.
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* 0 means "active low", i.e. card is protected when the GPIO is low;
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* 1 means "active high", i.e. card is protected when GPIO is high.
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*/
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} sdmmc_slot_config_t;
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/**
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9
components/esp_driver_sdmmc/include/driver/sdmmc_types.h
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9
components/esp_driver_sdmmc/include/driver/sdmmc_types.h
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@ -0,0 +1,9 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "driver/esp_sd_types.h"
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@ -45,7 +45,6 @@
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#define SDMMC_CLK_SRC_ATOMIC()
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#endif
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static const char *TAG = "sdmmc_periph";
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/**
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@ -70,7 +69,6 @@ typedef struct host_ctx_t {
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static host_ctx_t s_host_ctx;
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static void sdmmc_isr(void *arg);
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static void sdmmc_host_dma_init(void);
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static esp_err_t sdmmc_host_pullup_en_internal(int slot, int width);
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@ -209,10 +207,10 @@ void sdmmc_host_get_clk_dividers(uint32_t freq_khz, int *host_div, int *card_div
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* effective frequency range: 400 kHz - 32 MHz (32.1 - 39.9 MHz cannot be covered with given divider scheme)
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*/
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*host_div = (clk_src_freq_hz) / (freq_khz * 1000);
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if (*host_div > 15 ) {
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if (*host_div > 15) {
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*host_div = 2;
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*card_div = (clk_src_freq_hz / 2) / (2 * freq_khz * 1000);
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if ( ((clk_src_freq_hz / 2) % (2 * freq_khz * 1000)) > 0 ) {
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if (((clk_src_freq_hz / 2) % (2 * freq_khz * 1000)) > 0) {
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(*card_div)++;
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}
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} else if ((clk_src_freq_hz % (freq_khz * 1000)) > 0) {
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@ -315,22 +313,22 @@ esp_err_t sdmmc_host_set_input_delay(int slot, sdmmc_delay_phase_t delay_phase)
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int delay_phase_num = 0;
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sdmmc_ll_delay_phase_t phase = SDMMC_LL_DELAY_PHASE_0;
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switch (delay_phase) {
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case SDMMC_DELAY_PHASE_1:
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phase = SDMMC_LL_DELAY_PHASE_1;
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delay_phase_num = 1;
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break;
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case SDMMC_DELAY_PHASE_2:
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phase = SDMMC_LL_DELAY_PHASE_2;
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delay_phase_num = 2;
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break;
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case SDMMC_DELAY_PHASE_3:
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phase = SDMMC_LL_DELAY_PHASE_3;
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delay_phase_num = 3;
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break;
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default:
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phase = SDMMC_LL_DELAY_PHASE_0;
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delay_phase_num = 0;
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break;
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case SDMMC_DELAY_PHASE_1:
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phase = SDMMC_LL_DELAY_PHASE_1;
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delay_phase_num = 1;
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break;
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case SDMMC_DELAY_PHASE_2:
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phase = SDMMC_LL_DELAY_PHASE_2;
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delay_phase_num = 2;
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break;
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case SDMMC_DELAY_PHASE_3:
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phase = SDMMC_LL_DELAY_PHASE_3;
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delay_phase_num = 3;
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break;
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default:
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phase = SDMMC_LL_DELAY_PHASE_0;
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delay_phase_num = 0;
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break;
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}
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SDMMC_CLK_SRC_ATOMIC() {
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sdmmc_ll_set_din_delay(s_host_ctx.hal.dev, phase);
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@ -433,13 +431,13 @@ esp_err_t sdmmc_host_init(void)
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}
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// Enable interrupts
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SDMMC.intmask.val =
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SDMMC_INTMASK_CD |
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SDMMC_INTMASK_CMD_DONE |
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SDMMC_INTMASK_DATA_OVER |
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SDMMC_INTMASK_RCRC | SDMMC_INTMASK_DCRC |
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SDMMC_INTMASK_RTO | SDMMC_INTMASK_DTO | SDMMC_INTMASK_HTO |
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SDMMC_INTMASK_SBE | SDMMC_INTMASK_EBE |
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SDMMC_INTMASK_RESP_ERR | SDMMC_INTMASK_HLE; //sdio is enabled only when use.
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SDMMC_INTMASK_CD |
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SDMMC_INTMASK_CMD_DONE |
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SDMMC_INTMASK_DATA_OVER |
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SDMMC_INTMASK_RCRC | SDMMC_INTMASK_DCRC |
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SDMMC_INTMASK_RTO | SDMMC_INTMASK_DTO | SDMMC_INTMASK_HTO |
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SDMMC_INTMASK_SBE | SDMMC_INTMASK_EBE |
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SDMMC_INTMASK_RESP_ERR | SDMMC_INTMASK_HLE; //sdio is enabled only when use.
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SDMMC.ctrl.int_enable = 1;
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// Disable generation of Busy Clear Interrupt
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@ -479,7 +477,7 @@ static void configure_pin_iomux(uint8_t gpio_num)
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static void configure_pin_gpio_matrix(uint8_t gpio_num, uint8_t gpio_matrix_sig, gpio_mode_t mode, const char *name)
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{
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assert (gpio_num != (uint8_t) GPIO_NUM_NC);
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assert(gpio_num != (uint8_t) GPIO_NUM_NC);
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ESP_LOGD(TAG, "using GPIO%d as %s pin", gpio_num, name);
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gpio_reset_pin(gpio_num);
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gpio_set_direction(gpio_num, mode);
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@ -651,7 +649,7 @@ esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t *slot_config)
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// As hardware expects an active-high signal,
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// if WP signal is active low, then invert it in GPIO matrix,
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// else keep it in its default state
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esp_rom_gpio_connect_in_signal(matrix_in_wp, slot_info->write_protect, (gpio_wp_polarity? false : true));
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esp_rom_gpio_connect_in_signal(matrix_in_wp, slot_info->write_protect, (gpio_wp_polarity ? false : true));
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// By default, set probing frequency (400kHz) and 1-bit bus
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esp_err_t ret = sdmmc_host_set_card_clk(slot, 400);
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@ -733,7 +731,7 @@ esp_err_t sdmmc_host_set_bus_width(int slot, size_t width)
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size_t sdmmc_host_get_slot_width(int slot)
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{
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assert( slot == 0 || slot == 1 );
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assert(slot == 0 || slot == 1);
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return s_host_ctx.slot_ctx[slot].slot_width;
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}
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@ -18,13 +18,11 @@
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#include "driver/sdmmc_types.h"
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#include "driver/sdmmc_defs.h"
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#include "driver/sdmmc_host.h"
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#include "esp_timer.h"
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#include "esp_cache.h"
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#include "esp_private/esp_cache_private.h"
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#include "sdmmc_private.h"
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#include "soc/soc_caps.h"
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/* Number of DMA descriptors used for transfer.
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* Increasing this value above 4 doesn't improve performance for the usual case
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* of SD memory cards (most data transfers are multiples of 512 bytes).
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@ -56,18 +54,18 @@ typedef struct {
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} sdmmc_transfer_state_t;
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const uint32_t SDMMC_DATA_ERR_MASK =
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SDMMC_INTMASK_DTO | SDMMC_INTMASK_DCRC |
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SDMMC_INTMASK_HTO | SDMMC_INTMASK_SBE |
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SDMMC_INTMASK_EBE;
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SDMMC_INTMASK_DTO | SDMMC_INTMASK_DCRC |
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SDMMC_INTMASK_HTO | SDMMC_INTMASK_SBE |
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SDMMC_INTMASK_EBE;
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const uint32_t SDMMC_DMA_DONE_MASK =
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SDMMC_IDMAC_INTMASK_RI | SDMMC_IDMAC_INTMASK_TI |
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SDMMC_IDMAC_INTMASK_NI;
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SDMMC_IDMAC_INTMASK_RI | SDMMC_IDMAC_INTMASK_TI |
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SDMMC_IDMAC_INTMASK_NI;
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const uint32_t SDMMC_CMD_ERR_MASK =
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SDMMC_INTMASK_RTO |
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SDMMC_INTMASK_RCRC |
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SDMMC_INTMASK_RESP_ERR;
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SDMMC_INTMASK_RTO |
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SDMMC_INTMASK_RCRC |
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SDMMC_INTMASK_RESP_ERR;
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|
||||
SDMMC_ALIGN_ATTR static sdmmc_desc_t s_dma_desc[SDMMC_DMA_DESC_CNT];
|
||||
static sdmmc_transfer_state_t s_cur_transfer = { 0 };
|
||||
@ -80,9 +78,9 @@ static esp_pm_lock_handle_t s_pm_lock;
|
||||
static esp_err_t handle_idle_state_events(void);
|
||||
static sdmmc_hw_cmd_t make_hw_cmd(sdmmc_command_t* cmd);
|
||||
static esp_err_t handle_event(sdmmc_command_t* cmd, sdmmc_req_state_t* state,
|
||||
sdmmc_event_t* unhandled_events);
|
||||
sdmmc_event_t* unhandled_events);
|
||||
static esp_err_t process_events(sdmmc_event_t evt, sdmmc_command_t* cmd,
|
||||
sdmmc_req_state_t* pstate, sdmmc_event_t* unhandled_events);
|
||||
sdmmc_req_state_t* pstate, sdmmc_event_t* unhandled_events);
|
||||
static void process_command_response(uint32_t status, sdmmc_command_t* cmd);
|
||||
static void fill_dma_descriptors(size_t num_desc);
|
||||
static size_t get_free_descriptors_count(void);
|
||||
@ -139,7 +137,7 @@ esp_err_t sdmmc_host_do_transaction(int slot, sdmmc_command_t* cmdinfo)
|
||||
// Length should be either <4 or >=4 and =0 (mod 4).
|
||||
if (cmdinfo->datalen >= 4 && cmdinfo->datalen % 4 != 0) {
|
||||
ESP_LOGD(TAG, "%s: invalid size: total=%d",
|
||||
__func__, cmdinfo->datalen);
|
||||
__func__, cmdinfo->datalen);
|
||||
ret = ESP_ERR_INVALID_SIZE;
|
||||
goto out;
|
||||
}
|
||||
@ -247,7 +245,7 @@ static void fill_dma_descriptors(size_t num_desc)
|
||||
assert(!desc->owned_by_idmac);
|
||||
size_t size_to_fill =
|
||||
(s_cur_transfer.size_remaining < SDMMC_DMA_MAX_BUF_LEN) ?
|
||||
s_cur_transfer.size_remaining : SDMMC_DMA_MAX_BUF_LEN;
|
||||
s_cur_transfer.size_remaining : SDMMC_DMA_MAX_BUF_LEN;
|
||||
bool last = size_to_fill == s_cur_transfer.size_remaining;
|
||||
desc->last_descriptor = last;
|
||||
desc->second_address_chained = 1;
|
||||
@ -261,8 +259,8 @@ static void fill_dma_descriptors(size_t num_desc)
|
||||
s_cur_transfer.ptr += size_to_fill;
|
||||
s_cur_transfer.next_desc = (s_cur_transfer.next_desc + 1) % SDMMC_DMA_DESC_CNT;
|
||||
ESP_LOGV(TAG, "fill %d desc=%d rem=%d next=%d last=%d sz=%d",
|
||||
num_desc, next, s_cur_transfer.size_remaining,
|
||||
s_cur_transfer.next_desc, desc->last_descriptor, desc->buffer1_size);
|
||||
num_desc, next, s_cur_transfer.size_remaining,
|
||||
s_cur_transfer.next_desc, desc->last_descriptor, desc->buffer1_size);
|
||||
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
|
||||
esp_err_t ret = esp_cache_msync((void *)desc, sizeof(sdmmc_desc_t), ESP_CACHE_MSYNC_FLAG_DIR_C2M);
|
||||
assert(ret == ESP_OK);
|
||||
@ -284,16 +282,15 @@ static esp_err_t handle_idle_state_events(void)
|
||||
}
|
||||
if (evt.sdmmc_status != 0 || evt.dma_status != 0) {
|
||||
ESP_LOGE(TAG, "handle_idle_state_events unhandled: %08"PRIx32" %08"PRIx32,
|
||||
evt.sdmmc_status, evt.dma_status);
|
||||
evt.sdmmc_status, evt.dma_status);
|
||||
}
|
||||
|
||||
}
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
|
||||
static esp_err_t handle_event(sdmmc_command_t* cmd, sdmmc_req_state_t* state,
|
||||
sdmmc_event_t* unhandled_events)
|
||||
sdmmc_event_t* unhandled_events)
|
||||
{
|
||||
sdmmc_event_t event;
|
||||
esp_err_t err = sdmmc_host_wait_for_event(cmd->timeout_ms / portTICK_PERIOD_MS, &event);
|
||||
@ -305,8 +302,8 @@ static esp_err_t handle_event(sdmmc_command_t* cmd, sdmmc_req_state_t* state,
|
||||
return err;
|
||||
}
|
||||
ESP_LOGV(TAG, "sdmmc_handle_event: event %08"PRIx32" %08"PRIx32", unhandled %08"PRIx32" %08"PRIx32,
|
||||
event.sdmmc_status, event.dma_status,
|
||||
unhandled_events->sdmmc_status, unhandled_events->dma_status);
|
||||
event.sdmmc_status, event.dma_status,
|
||||
unhandled_events->sdmmc_status, unhandled_events->dma_status);
|
||||
event.sdmmc_status |= unhandled_events->sdmmc_status;
|
||||
event.dma_status |= unhandled_events->dma_status;
|
||||
process_events(event, cmd, state, unhandled_events);
|
||||
@ -357,8 +354,8 @@ static sdmmc_hw_cmd_t make_hw_cmd(sdmmc_command_t* cmd)
|
||||
res.send_auto_stop = cmd_needs_auto_stop(cmd) ? 1 : 0;
|
||||
}
|
||||
ESP_LOGV(TAG, "%s: opcode=%d, rexp=%d, crc=%d, auto_stop=%d", __func__,
|
||||
res.cmd_index, res.response_expect, res.check_response_crc,
|
||||
res.send_auto_stop);
|
||||
res.cmd_index, res.response_expect, res.check_response_crc,
|
||||
res.send_auto_stop);
|
||||
return res;
|
||||
}
|
||||
|
||||
@ -402,7 +399,7 @@ static void process_data_status(uint32_t status, sdmmc_command_t* cmd)
|
||||
} else if (status & SDMMC_INTMASK_DCRC) {
|
||||
cmd->error = ESP_ERR_INVALID_CRC;
|
||||
} else if ((status & SDMMC_INTMASK_EBE) &&
|
||||
(cmd->flags & SCF_CMD_READ) == 0) {
|
||||
(cmd->flags & SCF_CMD_READ) == 0) {
|
||||
cmd->error = ESP_ERR_TIMEOUT;
|
||||
} else {
|
||||
cmd->error = ESP_FAIL;
|
||||
@ -418,14 +415,15 @@ static void process_data_status(uint32_t status, sdmmc_command_t* cmd)
|
||||
|
||||
}
|
||||
|
||||
static inline bool mask_check_and_clear(uint32_t* state, uint32_t mask) {
|
||||
static inline bool mask_check_and_clear(uint32_t* state, uint32_t mask)
|
||||
{
|
||||
bool ret = ((*state) & mask) != 0;
|
||||
*state &= ~mask;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t process_events(sdmmc_event_t evt, sdmmc_command_t* cmd,
|
||||
sdmmc_req_state_t* pstate, sdmmc_event_t* unhandled_events)
|
||||
sdmmc_req_state_t* pstate, sdmmc_event_t* unhandled_events)
|
||||
{
|
||||
const char* const s_state_names[] __attribute__((unused)) = {
|
||||
"IDLE",
|
||||
@ -435,68 +433,67 @@ static esp_err_t process_events(sdmmc_event_t evt, sdmmc_command_t* cmd,
|
||||
};
|
||||
sdmmc_event_t orig_evt = evt;
|
||||
ESP_LOGV(TAG, "%s: state=%s evt=%"PRIx32" dma=%"PRIx32, __func__, s_state_names[*pstate],
|
||||
evt.sdmmc_status, evt.dma_status);
|
||||
evt.sdmmc_status, evt.dma_status);
|
||||
sdmmc_req_state_t next_state = *pstate;
|
||||
sdmmc_req_state_t state = (sdmmc_req_state_t) -1;
|
||||
while (next_state != state) {
|
||||
state = next_state;
|
||||
switch (state) {
|
||||
case SDMMC_IDLE:
|
||||
break;
|
||||
case SDMMC_IDLE:
|
||||
break;
|
||||
|
||||
case SDMMC_SENDING_CMD:
|
||||
if (mask_check_and_clear(&evt.sdmmc_status, SDMMC_CMD_ERR_MASK)) {
|
||||
process_command_response(orig_evt.sdmmc_status, cmd);
|
||||
// In addition to the error interrupt, CMD_DONE will also be
|
||||
// reported. It may occur immediately (in the same sdmmc_event_t) or
|
||||
// be delayed until the next interrupt.
|
||||
}
|
||||
if (mask_check_and_clear(&evt.sdmmc_status, SDMMC_INTMASK_CMD_DONE)) {
|
||||
process_command_response(orig_evt.sdmmc_status, cmd);
|
||||
if (cmd->error != ESP_OK) {
|
||||
next_state = SDMMC_IDLE;
|
||||
break;
|
||||
}
|
||||
|
||||
if (cmd->data == NULL) {
|
||||
next_state = SDMMC_IDLE;
|
||||
} else {
|
||||
next_state = SDMMC_SENDING_DATA;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case SDMMC_SENDING_DATA:
|
||||
if (mask_check_and_clear(&evt.sdmmc_status, SDMMC_DATA_ERR_MASK)) {
|
||||
process_data_status(orig_evt.sdmmc_status, cmd);
|
||||
sdmmc_host_dma_stop();
|
||||
}
|
||||
if (mask_check_and_clear(&evt.dma_status, SDMMC_DMA_DONE_MASK)) {
|
||||
s_cur_transfer.desc_remaining--;
|
||||
if (s_cur_transfer.size_remaining) {
|
||||
int desc_to_fill = get_free_descriptors_count();
|
||||
fill_dma_descriptors(desc_to_fill);
|
||||
sdmmc_host_dma_resume();
|
||||
}
|
||||
if (s_cur_transfer.desc_remaining == 0) {
|
||||
next_state = SDMMC_BUSY;
|
||||
}
|
||||
}
|
||||
if (orig_evt.sdmmc_status & (SDMMC_INTMASK_SBE | SDMMC_INTMASK_DATA_OVER)) {
|
||||
// On start bit error, DATA_DONE interrupt will not be generated
|
||||
case SDMMC_SENDING_CMD:
|
||||
if (mask_check_and_clear(&evt.sdmmc_status, SDMMC_CMD_ERR_MASK)) {
|
||||
process_command_response(orig_evt.sdmmc_status, cmd);
|
||||
// In addition to the error interrupt, CMD_DONE will also be
|
||||
// reported. It may occur immediately (in the same sdmmc_event_t) or
|
||||
// be delayed until the next interrupt.
|
||||
}
|
||||
if (mask_check_and_clear(&evt.sdmmc_status, SDMMC_INTMASK_CMD_DONE)) {
|
||||
process_command_response(orig_evt.sdmmc_status, cmd);
|
||||
if (cmd->error != ESP_OK) {
|
||||
next_state = SDMMC_IDLE;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case SDMMC_BUSY:
|
||||
if (!mask_check_and_clear(&evt.sdmmc_status, SDMMC_INTMASK_DATA_OVER)) {
|
||||
break;
|
||||
if (cmd->data == NULL) {
|
||||
next_state = SDMMC_IDLE;
|
||||
} else {
|
||||
next_state = SDMMC_SENDING_DATA;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case SDMMC_SENDING_DATA:
|
||||
if (mask_check_and_clear(&evt.sdmmc_status, SDMMC_DATA_ERR_MASK)) {
|
||||
process_data_status(orig_evt.sdmmc_status, cmd);
|
||||
sdmmc_host_dma_stop();
|
||||
}
|
||||
if (mask_check_and_clear(&evt.dma_status, SDMMC_DMA_DONE_MASK)) {
|
||||
s_cur_transfer.desc_remaining--;
|
||||
if (s_cur_transfer.size_remaining) {
|
||||
int desc_to_fill = get_free_descriptors_count();
|
||||
fill_dma_descriptors(desc_to_fill);
|
||||
sdmmc_host_dma_resume();
|
||||
}
|
||||
if (s_cur_transfer.desc_remaining == 0) {
|
||||
next_state = SDMMC_BUSY;
|
||||
}
|
||||
}
|
||||
if (orig_evt.sdmmc_status & (SDMMC_INTMASK_SBE | SDMMC_INTMASK_DATA_OVER)) {
|
||||
// On start bit error, DATA_DONE interrupt will not be generated
|
||||
next_state = SDMMC_IDLE;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case SDMMC_BUSY:
|
||||
if (!mask_check_and_clear(&evt.sdmmc_status, SDMMC_INTMASK_DATA_OVER)) {
|
||||
break;
|
||||
}
|
||||
process_data_status(orig_evt.sdmmc_status, cmd);
|
||||
next_state = SDMMC_IDLE;
|
||||
break;
|
||||
}
|
||||
ESP_LOGV(TAG, "%s state=%s next_state=%s", __func__, s_state_names[state], s_state_names[next_state]);
|
||||
}
|
@ -98,9 +98,9 @@ INPUT = \
|
||||
$(PROJECT_PATH)/components/driver/rmt/include/driver/rmt_types.h \
|
||||
$(PROJECT_PATH)/components/driver/sdio_slave/include/driver/sdio_slave.h \
|
||||
$(PROJECT_PATH)/components/driver/sigma_delta/include/driver/sdm.h \
|
||||
$(PROJECT_PATH)/components/driver/sdmmc/include/driver/sdmmc_default_configs.h \
|
||||
$(PROJECT_PATH)/components/driver/sdmmc/include/driver/sdmmc_host.h \
|
||||
$(PROJECT_PATH)/components/driver/sdmmc/include/driver/sdmmc_types.h \
|
||||
$(PROJECT_PATH)/components/esp_driver_sdmmc/include/driver/sdmmc_default_configs.h \
|
||||
$(PROJECT_PATH)/components/esp_driver_sdmmc/include/driver/sdmmc_host.h \
|
||||
$(PROJECT_PATH)/components/esp_driver_sdmmc/include/driver/sdmmc_types.h \
|
||||
$(PROJECT_PATH)/components/driver/sdspi/include/driver/sdspi_host.h \
|
||||
$(PROJECT_PATH)/components/esp_driver_spi/include/driver/spi_common.h \
|
||||
$(PROJECT_PATH)/components/esp_driver_spi/include/driver/spi_master.h \
|
||||
|
@ -8,7 +8,7 @@ Overview
|
||||
|
||||
The SD/SDIO/MMC driver currently supports SD memory, SDIO cards, and eMMC chips. This is a protocol level driver built on top of SDMMC and SD SPI host drivers.
|
||||
|
||||
SDMMC and SD SPI host drivers (:component_file:`driver/sdmmc/include/driver/sdmmc_host.h` and :component_file:`driver/sdspi/include/driver/sdspi_host.h`) provide API functions for:
|
||||
SDMMC and SD SPI host drivers (:component_file:`esp_driver_sdmmc/include/driver/sdmmc_host.h` and :component_file:`driver/sdspi/include/driver/sdspi_host.h`) provide API functions for:
|
||||
|
||||
- Sending commands to slave devices
|
||||
- Sending and receiving data
|
||||
|
@ -10,6 +10,7 @@ In order to control the dependence of other components on drivers at a smaller g
|
||||
- `esp_driver_gpio` - Driver for GPIO
|
||||
- `esp_driver_spi` - Driver for GPSPI
|
||||
- `esp_driver_mcpwm` - Driver for Motor Control PWM
|
||||
- `esp_driver_sdmmc` - Driver for SDMMC
|
||||
|
||||
For compatibility, the original `driver`` component is still treated as an all-in-one component by registering these `esp_driver_xyz`` components as its public dependencies. In other words, you do not need to modify the CMake file of an existing project, but you now have a way to specify the specific peripheral driver that your project depends on.
|
||||
|
||||
|
@ -8,7 +8,7 @@ SD/SDIO/MMC 驱动程序
|
||||
|
||||
SD/SDIO/MMC 驱动是一种基于 SDMMC 和 SD SPI 主机驱动的协议级驱动程序,目前已支持 SD 存储器、SDIO 卡和 eMMC 芯片。
|
||||
|
||||
SDMMC 主机驱动和 SD SPI 主机驱动(:component_file:`driver/sdmmc/include/driver/sdmmc_host.h` 和 :component_file:`driver/sdspi/include/driver/sdspi_host.h`)为以下功能提供 API:
|
||||
SDMMC 主机驱动和 SD SPI 主机驱动(:component_file:`esp_driver_sdmmc/include/driver/sdmmc_host.h` 和 :component_file:`driver/sdspi/include/driver/sdspi_host.h`)为以下功能提供 API:
|
||||
|
||||
- 发送命令至从设备
|
||||
- 接收和发送数据
|
||||
|
@ -10,6 +10,7 @@
|
||||
- `esp_driver_gpio` - GPIO 驱动
|
||||
- `esp_driver_spi` - 通用 SPI 驱动
|
||||
- `esp_driver_mcpwm` - 电机控制 PWM 驱动
|
||||
- `esp_driver_sdmmc` - SDMMC 驱动
|
||||
|
||||
为了兼容性,原来的 `driver` 组件仍然存在,并作为一个 “all-in-one" 的组件,将以上这些 `esp_driver_xyz` 组件注册成自己的公共依赖。换句话说,你无需修改既有项目的 CMake 文件,但是你现在多了一个途径去指定你项目依赖的具体的外设驱动。
|
||||
|
||||
|
@ -11,9 +11,11 @@ examples/storage/custom_flash_driver:
|
||||
examples/storage/emmc:
|
||||
depends_components:
|
||||
- sdmmc
|
||||
- driver
|
||||
- driver # `driver` will be replaced with `esp_driver_sdspi`
|
||||
- fatfs
|
||||
- vfs
|
||||
- esp_driver_sdmmc
|
||||
- esp_driver_sd_common
|
||||
enable:
|
||||
- if: IDF_TARGET == "esp32s3"
|
||||
reason: only support on esp32s3
|
||||
@ -107,7 +109,8 @@ examples/storage/perf_benchmark:
|
||||
- spiffs
|
||||
- wear_levelling
|
||||
- esp_partition
|
||||
- driver
|
||||
- esp_driver_sdmmc
|
||||
- esp_driver_sd_common
|
||||
disable:
|
||||
- if: IDF_TARGET == "esp32p4" and CONFIG_NAME in ["sdmmc_1line", "sdmmc_4line", "sdspi_1line"]
|
||||
temporary: true
|
||||
@ -121,7 +124,8 @@ examples/storage/sd_card/sdmmc:
|
||||
depends_components:
|
||||
- vfs
|
||||
- sdmmc
|
||||
- driver
|
||||
- esp_driver_sdmmc
|
||||
- esp_driver_sd_common
|
||||
disable:
|
||||
- if: SOC_SDMMC_HOST_SUPPORTED != 1
|
||||
disable_test:
|
||||
@ -133,7 +137,7 @@ examples/storage/sd_card/sdspi:
|
||||
depends_components:
|
||||
- vfs
|
||||
- sdmmc
|
||||
- driver
|
||||
- driver # To be updated to `esp_driver_sdspi`
|
||||
disable:
|
||||
- if: SOC_GPSPI_SUPPORTED != 1
|
||||
disable_test:
|
||||
|
@ -121,7 +121,7 @@ spiffs:
|
||||
|
||||
sdmmc:
|
||||
include:
|
||||
- 'components/driver/sdmmc/include/driver/'
|
||||
- 'components/esp_driver_sdmmc/include/driver/'
|
||||
- 'components/sdmmc/'
|
||||
allowed_licenses:
|
||||
- Apache-2.0
|
||||
|
Loading…
x
Reference in New Issue
Block a user