mirror of
https://github.com/espressif/esp-idf
synced 2025-03-10 01:29:21 -04:00
feat(bluetooth/controller): adopting new HCI layer code on ESP32-C2
This commit is contained in:
parent
18efdefafe
commit
cec91a1c10
@ -2,15 +2,15 @@
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menu "HCI Config"
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menu "HCI Config"
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choice BT_LE_HCI_INTERFACE
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choice BT_LE_HCI_INTERFACE
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prompt "Select HCI interface"
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prompt "HCI mode"
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default BT_LE_HCI_INTERFACE_USE_RAM
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default BT_LE_HCI_INTERFACE_USE_RAM
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config BT_LE_HCI_INTERFACE_USE_RAM
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config BT_LE_HCI_INTERFACE_USE_RAM
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bool "ram"
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bool "VHCI"
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help
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help
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Use RAM as HCI interface
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Use RAM as HCI interface
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config BT_LE_HCI_INTERFACE_USE_UART
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config BT_LE_HCI_INTERFACE_USE_UART
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bool "uart"
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bool "UART(H4)"
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help
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help
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Use UART as HCI interface
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Use UART as HCI interface
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endchoice
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endchoice
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@ -73,12 +73,26 @@ menu "HCI Config"
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UART_PARITY_ODD
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UART_PARITY_ODD
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endchoice
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endchoice
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config BT_LE_HCI_UART_TASK_STACK_SIZE
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config BT_LE_HCI_UART_RX_BUFFER_SIZE
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int "HCI uart task stack size"
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int "The size of rx ring buffer memory"
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depends on BT_LE_HCI_INTERFACE_USE_UART
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depends on !BT_LE_HCI_INTERFACE_USE_RAM
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default 1000
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default 512
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help
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help
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Set the size of uart task stack
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The size of rx ring buffer memory
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config BT_LE_HCI_UART_TX_BUFFER_SIZE
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int "The size of tx ring buffer memory"
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depends on !BT_LE_HCI_INTERFACE_USE_RAM
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default 256
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help
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The size of tx ring buffer memory
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config BT_LE_HCI_TRANS_TASK_STACK_SIZE
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int "HCI transport task stack size"
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depends on !BT_LE_HCI_INTERFACE_USE_RAM
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default 1024
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help
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This configures stack size of hci transport task
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endmenu
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endmenu
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config BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT
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config BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT
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@ -31,7 +31,7 @@
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#endif
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#endif
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#include "nimble/nimble_npl_os.h"
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#include "nimble/nimble_npl_os.h"
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#include "ble_hci_trans.h"
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#include "esp_hci_transport.h"
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#include "os/endian.h"
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#include "os/endian.h"
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#include "esp_bt.h"
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#include "esp_bt.h"
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@ -42,13 +42,8 @@
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#include "soc/syscon_reg.h"
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#include "soc/syscon_reg.h"
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#include "soc/modem_clkrst_reg.h"
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#include "soc/modem_clkrst_reg.h"
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#include "esp_private/periph_ctrl.h"
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#include "esp_private/periph_ctrl.h"
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#include "hci_uart.h"
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#include "bt_osi_mem.h"
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#include "bt_osi_mem.h"
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#ifdef CONFIG_BT_BLUEDROID_ENABLED
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#include "hci/hci_hal.h"
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#endif
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#include "esp_private/pm_impl.h"
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#include "esp_private/pm_impl.h"
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#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
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@ -65,6 +60,7 @@
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#include "hal/efuse_ll.h"
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#include "hal/efuse_ll.h"
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#include "soc/rtc.h"
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#include "soc/rtc.h"
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/* Macro definition
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/* Macro definition
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************************************************************************
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************************************************************************
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*/
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*/
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@ -77,12 +73,6 @@
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#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
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#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
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#define BT_ASSERT_PRINT ets_printf
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#define BT_ASSERT_PRINT ets_printf
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#ifdef CONFIG_BT_BLUEDROID_ENABLED
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/* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */
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#define ACL_DATA_MBUF_LEADINGSPCAE 4
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#endif // CONFIG_BT_BLUEDROID_ENABLED
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typedef enum ble_rtc_slow_clk_src {
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typedef enum ble_rtc_slow_clk_src {
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BT_SLOW_CLK_SRC_MAIN_XTAL,
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BT_SLOW_CLK_SRC_MAIN_XTAL,
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BT_SLOW_CLK_SRC_32K_XTAL_ON_PIN0,
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BT_SLOW_CLK_SRC_32K_XTAL_ON_PIN0,
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@ -106,12 +96,12 @@ struct ext_funcs_t {
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int (*_esp_intr_free)(void **ret_handle);
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int (*_esp_intr_free)(void **ret_handle);
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void *(* _malloc)(size_t size);
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void *(* _malloc)(size_t size);
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void (*_free)(void *p);
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void (*_free)(void *p);
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void (*_hal_uart_start_tx)(int);
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void (*_rsv1)(int);
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int (*_hal_uart_init_cbs)(int, hci_uart_tx_char, hci_uart_tx_done, hci_uart_rx_char, void *);
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int (*_rsv2)(int, int (*)(void *arg), int (*)(void *arg, uint8_t byte), int (*)(void *arg, uint8_t byte), void *);
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int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, uart_parity_t, uart_hw_flowcontrol_t);
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int (*_rsv3)(int, int32_t, uint8_t, uint8_t, int, int);
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int (*_hal_uart_close)(int);
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int (*_rsv4)(int);
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void (*_hal_uart_blocking_tx)(int, uint8_t);
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void (*_rsv5)(int, uint8_t);
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int (*_hal_uart_init)(int, void *);
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int (*_rsv6)(int, void *);
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int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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void (* _task_delete)(void *task_handle);
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void (* _task_delete)(void *task_handle);
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void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
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void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
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@ -190,16 +180,6 @@ static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
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static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
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static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
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static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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static void task_delete_wrapper(void *task_handle);
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static void task_delete_wrapper(void *task_handle);
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#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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static void hci_uart_start_tx_wrapper(int uart_no);
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static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
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hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg);
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static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits,
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uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl);
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static int hci_uart_close_wrapper(int uart_no);
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static void hci_uart_blocking_tx_wrapper(int port, uint8_t data);
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static int hci_uart_init_wrapper(int uart_no, void *cfg);
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#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
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static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
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void *arg, void **ret_handle_in);
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void *arg, void **ret_handle_in);
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static int esp_intr_free_wrapper(void **ret_handle);
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static int esp_intr_free_wrapper(void **ret_handle);
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@ -217,7 +197,6 @@ static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, b
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*/
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*/
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/* Static variable declare */
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/* Static variable declare */
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static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
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static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
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#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
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#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
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const static uint32_t log_bufs_size[] = {CONFIG_BT_LE_LOG_CTRL_BUF1_SIZE, CONFIG_BT_LE_LOG_HCI_BUF_SIZE, CONFIG_BT_LE_LOG_CTRL_BUF2_SIZE};
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const static uint32_t log_bufs_size[] = {CONFIG_BT_LE_LOG_CTRL_BUF1_SIZE, CONFIG_BT_LE_LOG_HCI_BUF_SIZE, CONFIG_BT_LE_LOG_CTRL_BUF2_SIZE};
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#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
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#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
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@ -231,7 +210,6 @@ static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
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#define BLE_RTC_DELAY_US (1800)
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#define BLE_RTC_DELAY_US (1800)
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static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
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static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
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._magic = OSI_COEX_MAGIC_VALUE,
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._magic = OSI_COEX_MAGIC_VALUE,
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._version = OSI_COEX_VERSION,
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._version = OSI_COEX_VERSION,
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@ -247,14 +225,6 @@ struct ext_funcs_t ext_funcs_ro = {
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._esp_intr_free = esp_intr_free_wrapper,
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._esp_intr_free = esp_intr_free_wrapper,
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._malloc = bt_osi_mem_malloc_internal,
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._malloc = bt_osi_mem_malloc_internal,
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._free = bt_osi_mem_free,
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._free = bt_osi_mem_free,
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#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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._hal_uart_start_tx = hci_uart_start_tx_wrapper,
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._hal_uart_init_cbs = hci_uart_init_cbs_wrapper,
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._hal_uart_config = hci_uart_config_wrapper,
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._hal_uart_close = hci_uart_close_wrapper,
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._hal_uart_blocking_tx = hci_uart_blocking_tx_wrapper,
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._hal_uart_init = hci_uart_init_wrapper,
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#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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._task_create = task_create_wrapper,
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._task_create = task_create_wrapper,
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._task_delete = task_delete_wrapper,
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._task_delete = task_delete_wrapper,
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._osi_assert = osi_assert_wrapper,
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._osi_assert = osi_assert_wrapper,
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@ -301,83 +271,6 @@ static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
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#endif // CONFIG_SW_COEXIST_ENABLE
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#endif // CONFIG_SW_COEXIST_ENABLE
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}
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}
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#ifdef CONFIG_BT_BLUEDROID_ENABLED
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bool esp_vhci_host_check_send_available(void)
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{
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if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
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return false;
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}
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return true;
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}
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/**
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* Allocates an mbuf for use by the nimble host.
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*/
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static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space)
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{
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struct os_mbuf *om;
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int rc;
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om = os_msys_get_pkthdr(0, 0);
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if (om == NULL) {
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return NULL;
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}
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if (om->om_omp->omp_databuf_len < leading_space) {
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rc = os_mbuf_free_chain(om);
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assert(rc == 0);
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return NULL;
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}
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om->om_data += leading_space;
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return om;
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}
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/**
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* Allocates an mbuf suitable for an HCI ACL data packet.
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*
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* @return An empty mbuf on success; null on memory
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* exhaustion.
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*/
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struct os_mbuf *ble_hs_mbuf_acl_pkt(void)
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{
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return ble_hs_mbuf_gen_pkt(4 + 1);
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}
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void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
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{
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if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
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return;
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}
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if (*(data) == DATA_TYPE_COMMAND) {
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struct ble_hci_cmd *cmd = NULL;
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cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
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assert(cmd);
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memcpy((uint8_t *)cmd, data + 1, len - 1);
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ble_hci_trans_hs_cmd_tx((uint8_t *)cmd);
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}
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if (*(data) == DATA_TYPE_ACL) {
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struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE);
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assert(om);
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assert(os_mbuf_append(om, &data[1], len - 1) == 0);
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ble_hci_trans_hs_acl_tx(om);
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}
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}
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esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
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{
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if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
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return ESP_FAIL;
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}
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ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL);
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return ESP_OK;
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}
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#endif // CONFIG_BT_BLUEDROID_ENABLED
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static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
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static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
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{
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{
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return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
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return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
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@ -407,56 +300,6 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer
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return rc;
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return rc;
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}
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}
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#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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static void hci_uart_start_tx_wrapper(int uart_no)
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{
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hci_uart_start_tx(uart_no);
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}
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static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
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hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg)
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{
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int rc = -1;
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rc = hci_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg);
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return rc;
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}
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static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits,
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uint8_t stop_bits,uart_parity_t parity,
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uart_hw_flowcontrol_t flow_ctl)
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{
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int rc = -1;
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rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl);
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return rc;
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}
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static int hci_uart_close_wrapper(int uart_no)
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{
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int rc = -1;
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rc = hci_uart_close(uart_no);
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return rc;
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}
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static void hci_uart_blocking_tx_wrapper(int port, uint8_t data)
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{
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//This function is nowhere to use.
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}
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static int hci_uart_init_wrapper(int uart_no, void *cfg)
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{
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//This function is nowhere to use.
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return 0;
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}
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#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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static int ble_hci_unregistered_hook(void*, void*)
|
|
||||||
{
|
|
||||||
ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in)
|
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in)
|
||||||
{
|
{
|
||||||
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
|
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
|
||||||
@ -630,12 +473,32 @@ static ble_rtc_slow_clk_src_t ble_rtc_clk_init(esp_bt_controller_config_t *cfg)
|
|||||||
return slow_clk_src;
|
return slow_clk_src;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#if CONFIG_BT_NIMBLE_ENABLED
|
||||||
|
#include "ble_hci_trans.h"
|
||||||
|
extern int r_ble_hci_reset(void);
|
||||||
|
extern int r_ble_hci_set_acl_free_cb(os_mempool_put_fn *cb, void *arg);
|
||||||
|
struct ble_hci_trans_funcs_t ble_hci_trans_funcs =
|
||||||
|
{
|
||||||
|
._ble_hci_trans_hs_acl_tx = r_ble_hci_trans_hs_acl_tx,
|
||||||
|
._ble_hci_trans_hs_cmd_tx = r_ble_hci_trans_hs_cmd_tx,
|
||||||
|
._ble_hci_trans_ll_acl_tx = r_ble_hci_trans_ll_acl_tx,
|
||||||
|
._ble_hci_trans_ll_evt_tx = r_ble_hci_trans_ll_evt_tx,
|
||||||
|
._ble_hci_trans_reset = r_ble_hci_reset,
|
||||||
|
._ble_hci_trans_set_acl_free_cb = r_ble_hci_set_acl_free_cb,
|
||||||
|
};
|
||||||
|
|
||||||
|
static int ble_hci_unregistered_hook(void*, void*)
|
||||||
|
{
|
||||||
|
ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif // CONFIG_BT_NIMBLE_ENABLED
|
||||||
|
|
||||||
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
|
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
|
||||||
{
|
{
|
||||||
esp_err_t ret = ESP_OK;
|
esp_err_t ret = ESP_OK;
|
||||||
ble_npl_count_info_t npl_info;
|
ble_npl_count_info_t npl_info;
|
||||||
ble_rtc_slow_clk_src_t rtc_clk_src;
|
ble_rtc_slow_clk_src_t rtc_clk_src;
|
||||||
|
|
||||||
memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
|
memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
|
||||||
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
|
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
|
||||||
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
||||||
@ -756,11 +619,28 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
|
|||||||
esp_ble_ll_set_public_addr(mac);
|
esp_ble_ll_set_public_addr(mac);
|
||||||
|
|
||||||
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
||||||
|
#if CONFIG_BT_NIMBLE_ENABLED
|
||||||
ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL,
|
ble_hci_trans_funcs_ptr = &ble_hci_trans_funcs;
|
||||||
|
r_ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL,
|
||||||
(ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL);
|
(ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL);
|
||||||
|
#else
|
||||||
|
uint8_t hci_transport_mode;
|
||||||
|
#if CONFIG_BT_LE_HCI_INTERFACE_USE_RAM
|
||||||
|
hci_transport_mode = HCI_TRANSPORT_VHCI;
|
||||||
|
#elif CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
||||||
|
hci_transport_mode = HCI_TRANSPORT_UART_NO_DMA;
|
||||||
|
#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_RAM
|
||||||
|
ret = hci_transport_init(hci_transport_mode);
|
||||||
|
if (ret) {
|
||||||
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "hci transport init failed %d", ret);
|
||||||
|
goto free_controller;
|
||||||
|
}
|
||||||
|
#endif // CONFIG_BT_NIMBLE_ENABLED
|
||||||
return ESP_OK;
|
return ESP_OK;
|
||||||
free_controller:
|
free_controller:
|
||||||
|
#if (!CONFIG_BT_NIMBLE_ENABLED)
|
||||||
|
hci_transport_deinit();
|
||||||
|
#endif // (!CONFIG_BT_NIMBLE_ENABLED)
|
||||||
controller_sleep_deinit();
|
controller_sleep_deinit();
|
||||||
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||||
controller_init_err:
|
controller_init_err:
|
||||||
@ -788,7 +668,9 @@ esp_err_t esp_bt_controller_deinit(void)
|
|||||||
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
||||||
return ESP_FAIL;
|
return ESP_FAIL;
|
||||||
}
|
}
|
||||||
|
#if (!CONFIG_BT_NIMBLE_ENABLED)
|
||||||
|
hci_transport_deinit();
|
||||||
|
#endif // (!CONFIG_BT_NIMBLE_ENABLED)
|
||||||
controller_sleep_deinit();
|
controller_sleep_deinit();
|
||||||
|
|
||||||
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||||
|
@ -28,7 +28,6 @@ extern "C" {
|
|||||||
#else
|
#else
|
||||||
#define BLE_LL_SCAN_PHY_NUMBER_N (1)
|
#define BLE_LL_SCAN_PHY_NUMBER_N (1)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST MYNEWT_VAL(BLE_MAX_PERIODIC_ADVERTISER_LIST)
|
#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST MYNEWT_VAL(BLE_MAX_PERIODIC_ADVERTISER_LIST)
|
||||||
#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS MYNEWT_VAL(BLE_MAX_PERIODIC_SYNCS)
|
#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS MYNEWT_VAL(BLE_MAX_PERIODIC_SYNCS)
|
||||||
#define DEFAULT_BT_LE_MAX_CONNECTIONS MYNEWT_VAL(BLE_MAX_CONNECTIONS)
|
#define DEFAULT_BT_LE_MAX_CONNECTIONS MYNEWT_VAL(BLE_MAX_CONNECTIONS)
|
||||||
@ -152,6 +151,20 @@ extern "C" {
|
|||||||
#else
|
#else
|
||||||
#define DEFAULT_BT_LE_ROLE_OBSERVER (0)
|
#define DEFAULT_BT_LE_ROLE_OBSERVER (0)
|
||||||
#endif
|
#endif
|
||||||
|
#if defined (CONFIG_BT_LE_HCI_UART_FLOWCTRL)
|
||||||
|
#define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (CONFIG_BT_LE_HCI_UART_FLOWCTRL)
|
||||||
|
#if DEFAULT_BT_LE_HCI_UART_FLOW_CTRL
|
||||||
|
#define DEFAULT_BT_LE_HCI_UART_CTS_PIN (CONFIG_BT_LE_HCI_UART_CTS_PIN)
|
||||||
|
#define DEFAULT_BT_LE_HCI_UART_RTS_PIN (CONFIG_BT_LE_HCI_UART_RTS_PIN)
|
||||||
|
#else
|
||||||
|
#define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1)
|
||||||
|
#define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1)
|
||||||
|
#endif
|
||||||
|
#else
|
||||||
|
#define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0)
|
||||||
|
#define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1)
|
||||||
|
#define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1)
|
||||||
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF
|
#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF
|
||||||
@ -192,8 +205,6 @@ extern "C" {
|
|||||||
#define DEFAULT_BT_LE_HCI_UART_DATA_BITS (UART_DATA_8_BITS)
|
#define DEFAULT_BT_LE_HCI_UART_DATA_BITS (UART_DATA_8_BITS)
|
||||||
#define DEFAULT_BT_LE_HCI_UART_STOP_BITS (UART_STOP_BITS_1)
|
#define DEFAULT_BT_LE_HCI_UART_STOP_BITS (UART_STOP_BITS_1)
|
||||||
#define DEFAULT_BT_LE_HCI_UART_PARITY (0)
|
#define DEFAULT_BT_LE_HCI_UART_PARITY (0)
|
||||||
#define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (CONFIG_BT_LE_HCI_UART_TASK_STACK_SIZE)
|
|
||||||
#define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0)
|
|
||||||
#else
|
#else
|
||||||
#define DEFAULT_BT_LE_HCI_UART_TX_PIN (0)
|
#define DEFAULT_BT_LE_HCI_UART_TX_PIN (0)
|
||||||
#define DEFAULT_BT_LE_HCI_UART_RX_PIN (0)
|
#define DEFAULT_BT_LE_HCI_UART_RX_PIN (0)
|
||||||
@ -202,8 +213,6 @@ extern "C" {
|
|||||||
#define DEFAULT_BT_LE_HCI_UART_DATA_BITS (0)
|
#define DEFAULT_BT_LE_HCI_UART_DATA_BITS (0)
|
||||||
#define DEFAULT_BT_LE_HCI_UART_STOP_BITS (0)
|
#define DEFAULT_BT_LE_HCI_UART_STOP_BITS (0)
|
||||||
#define DEFAULT_BT_LE_HCI_UART_PARITY (0)
|
#define DEFAULT_BT_LE_HCI_UART_PARITY (0)
|
||||||
#define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (0)
|
|
||||||
#define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0)
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Unchanged configuration */
|
/* Unchanged configuration */
|
||||||
|
@ -1 +1 @@
|
|||||||
Subproject commit e597ae529761d270f10d0616c375faa0e4b7ca13
|
Subproject commit fc65dbee2093051bdf8dd45fd4346811a39a4ff8
|
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
|
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*/
|
*/
|
||||||
@ -262,13 +262,6 @@ typedef struct {
|
|||||||
.controller_run_cpu = 0, \
|
.controller_run_cpu = 0, \
|
||||||
.enable_qa_test = RUN_QA_TEST, \
|
.enable_qa_test = RUN_QA_TEST, \
|
||||||
.enable_bqb_test = RUN_BQB_TEST, \
|
.enable_bqb_test = RUN_BQB_TEST, \
|
||||||
.enable_uart_hci = HCI_UART_EN, \
|
|
||||||
.ble_hci_uart_port = DEFAULT_BT_LE_HCI_UART_PORT, \
|
|
||||||
.ble_hci_uart_baud = DEFAULT_BT_LE_HCI_UART_BAUD, \
|
|
||||||
.ble_hci_uart_data_bits = DEFAULT_BT_LE_HCI_UART_DATA_BITS, \
|
|
||||||
.ble_hci_uart_stop_bits = DEFAULT_BT_LE_HCI_UART_STOP_BITS, \
|
|
||||||
.ble_hci_uart_flow_ctrl = DEFAULT_BT_LE_HCI_UART_FLOW_CTRL, \
|
|
||||||
.ble_hci_uart_uart_parity = DEFAULT_BT_LE_HCI_UART_PARITY, \
|
|
||||||
.enable_tx_cca = DEFAULT_BT_LE_TX_CCA_ENABLED, \
|
.enable_tx_cca = DEFAULT_BT_LE_TX_CCA_ENABLED, \
|
||||||
.cca_rssi_thresh = 256 - DEFAULT_BT_LE_CCA_RSSI_THRESH, \
|
.cca_rssi_thresh = 256 - DEFAULT_BT_LE_CCA_RSSI_THRESH, \
|
||||||
.sleep_en = NIMBLE_SLEEP_ENABLE, \
|
.sleep_en = NIMBLE_SLEEP_ENABLE, \
|
||||||
|
@ -828,7 +828,6 @@ r_ble_ll_hci_ev_send_adv_set_terminated = 0x40000ff4;
|
|||||||
r_ble_ll_hci_ev_send_scan_req_recv = 0x40000ff8;
|
r_ble_ll_hci_ev_send_scan_req_recv = 0x40000ff8;
|
||||||
r_ble_ll_hci_ev_send_scan_timeout = 0x40000ffc;
|
r_ble_ll_hci_ev_send_scan_timeout = 0x40000ffc;
|
||||||
r_ble_ll_hci_ev_send_vendor_err = 0x40001000;
|
r_ble_ll_hci_ev_send_vendor_err = 0x40001000;
|
||||||
r_ble_ll_hci_event_send = 0x40001004;
|
|
||||||
r_ble_ll_hci_ext_scan_set_enable = 0x40001008;
|
r_ble_ll_hci_ext_scan_set_enable = 0x40001008;
|
||||||
r_ble_ll_hci_get_num_cmd_pkts = 0x4000100c;
|
r_ble_ll_hci_get_num_cmd_pkts = 0x4000100c;
|
||||||
r_ble_ll_hci_info_params_cmd_proc = 0x40001010;
|
r_ble_ll_hci_info_params_cmd_proc = 0x40001010;
|
||||||
|
Loading…
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Reference in New Issue
Block a user