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Merge branch 'esp32/run_panic_debug_v5.0' into 'release/v5.0'

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fix(esp32): Fixed qa program may fail issue when cpu 240m (v5.0)

See merge request espressif/esp-idf!37236
This commit is contained in:
Jiang Jiang Jian 2025-02-27 14:20:37 +08:00
commit cefc3e2b26
2 changed files with 3 additions and 2 deletions
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1
components/esp_hw_support/port/esp32/rtc_clk.c
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@ -393,6 +393,7 @@ static void rtc_clk_cpu_freq_to_pll_mhz(int cpu_freq_mhz)
rtc_clk_apb_freq_update(80 * MHZ);
ets_update_cpu_frequency(cpu_freq_mhz);
rtc_clk_wait_for_slow_cycle();
esp_rom_delay_us(30);
}
void rtc_clk_cpu_freq_set_xtal(void)

4
components/soc/esp32/include/soc/rtc.h
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@ -66,11 +66,11 @@ extern "C" {
*/
#define RTC_CNTL_DBIAS_HP_VOLT (RTC_CNTL_DBIAS_1V25 - efuse_ll_get_vol_level_hp_inv())
#ifdef CONFIG_ESPTOOLPY_FLASHFREQ_80M
#define DIG_DBIAS_80M_160M RTC_CNTL_DBIAS_HP_VOLT
#define DIG_DBIAS_80M_160M RTC_CNTL_DBIAS_1V25
#else
#define DIG_DBIAS_80M_160M RTC_CNTL_DBIAS_1V10
#endif
#define DIG_DBIAS_240M RTC_CNTL_DBIAS_HP_VOLT
#define DIG_DBIAS_240M RTC_CNTL_DBIAS_1V25
#define DIG_DBIAS_XTAL RTC_CNTL_DBIAS_1V10
#define DIG_DBIAS_2M RTC_CNTL_DBIAS_1V00