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patch(spi_flash): cleanup XMC flash chip usage according to new information

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This commit is contained in:
C.S.M 2024-10-09 17:24:12 +08:00
parent 7957815ea3
commit d00e400552
5 changed files with 53 additions and 10 deletions
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9
components/bootloader_support/bootloader_flash/src/bootloader_flash.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -678,7 +678,6 @@ esp_err_t bootloader_flash_wrap_set(spi_flash_wrap_mode_t mode)
#define XMC_SUPPORT CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT
#define XMC_VENDOR_ID_1 0x20
#define XMC_VENDOR_ID_2 0x46
#if BOOTLOADER_BUILD
#define BOOTLOADER_FLASH_LOG(level, ...) ESP_LOG##level(TAG, ##__VA_ARGS__)
@ -695,7 +694,7 @@ static IRAM_ATTR bool is_xmc_chip_strict(uint32_t rdid)
uint32_t mfid = BYTESHIFT(rdid, 1);
uint32_t cpid = BYTESHIFT(rdid, 0);
if (vendor_id != XMC_VENDOR_ID_1 && vendor_id != XMC_VENDOR_ID_2) {
if (vendor_id != XMC_VENDOR_ID_1) {
return false;
}
@ -728,7 +727,7 @@ esp_err_t IRAM_ATTR bootloader_flash_xmc_startup(void)
// Check the Manufacturer ID in SFDP registers (JEDEC standard). If not XMC chip, no need to run the flow
const int sfdp_mfid_addr = 0x10;
uint8_t mf_id = (bootloader_flash_read_sfdp(sfdp_mfid_addr, 1) & 0xff);
if ((mf_id != XMC_VENDOR_ID_1) && (mf_id != XMC_VENDOR_ID_2)) {
if (mf_id != XMC_VENDOR_ID_1) {
BOOTLOADER_FLASH_LOG(D, "non-XMC chip detected by SFDP Read (%02X), skip.", mf_id);
return ESP_OK;
}
@ -760,7 +759,7 @@ esp_err_t IRAM_ATTR bootloader_flash_xmc_startup(void)
static IRAM_ATTR bool is_xmc_chip(uint32_t rdid)
{
uint32_t vendor_id = (rdid >> 16) & 0xFF;
return ((vendor_id == XMC_VENDOR_ID_1) || (vendor_id == XMC_VENDOR_ID_2));
return (vendor_id == XMC_VENDOR_ID_1);
}
esp_err_t IRAM_ATTR bootloader_flash_xmc_startup(void)

15
components/spi_flash/Kconfig
View File

@ -40,7 +40,7 @@ menu "Main Flash configuration"
default SPI_FLASH_HPM_AUTO
help
Whether the High Performance Mode of Flash is enabled. As an optional feature, user needs to manually
enable this option as a confirmation. To be back-compatible with earlier IDF versionn, this option is
enable this option as a confirmation. To be back-compatible with earlier IDF version, this option is
automatically enabled with warning when Flash running > 80Mhz.
config SPI_FLASH_HPM_ENA
@ -101,6 +101,17 @@ menu "Main Flash configuration"
Also refer to `Concurrency Constraints for Flash on SPI1` > `Flash Auto Suspend Feature`
before enabling this option.
config SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND
bool "Enable XMC-C series flash chip suspend feature anyway"
default n
help
XMC-C series is regarded as not qualified for the Suspend feature, since its specification
has a tRS >= 1ms restriction. We strongly do not suggest using it for the Suspend feature.
However, if your product in field has enabled this feature, you may still enable this
config option to keep the legacy behavior.
For new users, DO NOT enable this config.
endmenu
endmenu
@ -236,7 +247,7 @@ menu "SPI Flash driver"
Please use this configuration together with ``SPI_FLASH_ERASE_YIELD_DURATION_MS`` and
``SPI_FLASH_ERASE_YIELD_TICKS`` after carefully checking flash datasheet to avoid a
watchdog timeout.
For more information, please check `SPI Flash API` reference documenation
For more information, please check `SPI Flash API` reference documentation
under section `OS Function`.
config SPI_FLASH_ERASE_YIELD_DURATION_MS

2
components/spi_flash/flash_brownout_hook.c
View File

@ -20,7 +20,7 @@ void spi_flash_needs_reset_check(void)
{
// Currently only XMC is suggested to reset when brownout
#if CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC
if ((g_rom_flashchip.device_id >> 16) == 0x20 || (g_rom_flashchip.device_id >> 16) == 0x46) {
if ((g_rom_flashchip.device_id >> 16) == 0x20) {
flash_brownout_needs_reset = true;
}
#endif

2
components/spi_flash/include/spi_flash/spi_flash_defs.h
View File

@ -51,6 +51,8 @@
#define CMD_RST_EN 0x66
#define CMD_RST_DEV 0x99
#define CMD_RDSFDP 0x5A /* Read the SFDP of the flash */
#define SPI_FLASH_DIO_ADDR_BITLEN 24
#define SPI_FLASH_DIO_DUMMY_BITLEN 4
#define SPI_FLASH_QIO_ADDR_BITLEN 24

35
components/spi_flash/spi_flash_chip_generic.c
View File

@ -510,7 +510,7 @@ esp_err_t spi_flash_chip_generic_write_encrypted(esp_flash_t *chip, const void *
return ESP_ERR_NOT_SUPPORTED;
}
/* Check if the buffer and length can qualify the requirments */
/* Check if the buffer and length can qualify the requirements */
if (esp_flash_encryption->flash_encryption_check(address, length) != true) {
return ESP_ERR_NOT_SUPPORTED;
}
@ -599,8 +599,39 @@ spi_flash_caps_t spi_flash_chip_generic_get_caps(esp_flash_t *chip)
// 32M-bits address support
// flash suspend support
// Only `XMC` support suspend for now.
// XMC-D support suspend
if (chip->chip_id >> 16 == 0x46) {
caps_flags |= SPI_FLASH_CHIP_CAP_SUSPEND;
}
// XMC-D support suspend (some D series flash chip begin with 0x20, difference checked by SFDP)
if (chip->chip_id >> 16 == 0x20) {
uint8_t data = 0;
spi_flash_trans_t t = {
.command = CMD_RDSFDP,
.address_bitlen = 24,
.address = 0x32,
.mosi_len = 0,
.mosi_data = 0,
.miso_len = 1,
.miso_data = &data,
.dummy_bitlen = 8,
};
chip->host->driver->common_command(chip->host, &t);
if((data & 0x8) == 0x8) {
caps_flags |= SPI_FLASH_CHIP_CAP_SUSPEND;
}
}
#if CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND
// XMC-C suspend has big risk. But can enable this anyway.
if (chip->chip_id >> 16 == 0x20) {
caps_flags |= SPI_FLASH_CHIP_CAP_SUSPEND;
}
#endif
// FM support suspend
if (chip->chip_id >> 16 == 0xa1) {
caps_flags |= SPI_FLASH_CHIP_CAP_SUSPEND;
}
// flash read unique id.