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https://github.com/espressif/esp-idf
synced 2025-03-09 17:19:09 -04:00
fix(usb): Fixed missing GPIO drive capability on ESP32-P4
All USB PHYs that share their IOs with GPIOs must set the GPIO's drive capability to maximum.
This commit is contained in:
Tomas Rezucha
parent
febc33a094
commit
d12312bf76
@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -28,6 +28,11 @@ static const usb_otg_signal_conn_t dwc_fs_otg_signals = {
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.dischrgvbus = USB_SRP_DISCHRGVBUS_PAD_OUT_IDX,
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};
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static const usb_internal_phy_io_t internal_phy_io = {
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.dp = 27,
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.dm = 26,
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};
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/* --------------------------------- Public --------------------------------- */
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const usb_dwc_info_t usb_dwc_info = {
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@ -36,6 +41,7 @@ const usb_dwc_info_t usb_dwc_info = {
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[0] = {
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.fsls_signals = NULL,
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.otg_signals = NULL,
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.internal_phy_io = NULL, // HS PHY is not mapped to any GPIO
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.irq = ETS_USB_OTG_INTR_SOURCE,
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.irq_2nd_cpu = ETS_USB_OTG_ENDP_MULTI_PROC_INTR_SOURCE,
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},
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@ -43,6 +49,7 @@ const usb_dwc_info_t usb_dwc_info = {
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[1] = {
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.fsls_signals = NULL,
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.otg_signals = &dwc_fs_otg_signals,
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.internal_phy_io = &internal_phy_io,
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.irq = ETS_USB_OTG11_CH0_INTR_SOURCE,
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.irq_2nd_cpu = -1,
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},
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@ -1,11 +1,10 @@
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "soc/gpio_sig_map.h"
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#include "soc/usb_periph.h"
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#include "soc/interrupts.h"
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#include "soc/usb_dwc_periph.h"
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@ -40,6 +39,11 @@ static const usb_otg_signal_conn_t otg_signals = {
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.dischrgvbus = USB_SRP_DISCHRGVBUS_IDX,
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};
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static const usb_internal_phy_io_t internal_phy_io = {
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.dp = 20,
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.dm = 19,
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};
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/* --------------------------------- Public --------------------------------- */
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const usb_dwc_info_t usb_dwc_info = {
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@ -47,6 +51,7 @@ const usb_dwc_info_t usb_dwc_info = {
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[0] = {
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.fsls_signals = &fsls_signals,
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.otg_signals = &otg_signals,
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.internal_phy_io = &internal_phy_io,
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.irq = ETS_USB_INTR_SOURCE,
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.irq_2nd_cpu = -1,
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},
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@ -55,6 +60,7 @@ const usb_dwc_info_t usb_dwc_info = {
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/* ------------------------------- Deprecated ------------------------------- */
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#include "soc/usb_periph.h"
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/*
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Note: These IO pins are deprecated. When connecting USB OTG to an external FSLS
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PHY, the FSLS Serial Interface signals can be routed to any GPIO via the GPIO
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@ -1,12 +1,10 @@
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include "soc/gpio_sig_map.h"
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#include "soc/usb_periph.h"
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#include "soc/interrupts.h"
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#include "soc/usb_dwc_periph.h"
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@ -41,6 +39,11 @@ static const usb_otg_signal_conn_t otg_signals = {
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.dischrgvbus = USB_SRP_DISCHRGVBUS_IDX,
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};
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static const usb_internal_phy_io_t internal_phy_io = {
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.dp = 20,
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.dm = 19,
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};
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/* --------------------------------- Public --------------------------------- */
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const usb_dwc_info_t usb_dwc_info = {
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@ -48,6 +51,7 @@ const usb_dwc_info_t usb_dwc_info = {
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[0] = {
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.fsls_signals = &fsls_signals,
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.otg_signals = &otg_signals,
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.internal_phy_io = &internal_phy_io,
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.irq = ETS_USB_INTR_SOURCE,
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.irq_2nd_cpu = -1,
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},
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@ -56,6 +60,7 @@ const usb_dwc_info_t usb_dwc_info = {
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/* ------------------------------- Deprecated ------------------------------- */
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#include "soc/usb_periph.h"
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/*
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Note: These IO pins are deprecated. When connecting USB OTG to an external FSLS
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PHY, the FSLS Serial Interface signals can be routed to any GPIO via the GPIO
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@ -1,17 +1,12 @@
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/*
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* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "soc/soc_pins.h"
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#include "soc/soc_caps.h"
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#include "soc/periph_defs.h"
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#include "soc/gpio_sig_map.h"
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#ifdef __cplusplus
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extern "C" {
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@ -65,15 +60,29 @@ typedef struct {
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int dischrgvbus;
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} usb_otg_signal_conn_t;
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/**
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* @brief Internal USB PHY IO
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*
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* Structure to store the IO numbers for a particular internal USB PHY
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*/
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typedef struct {
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int dp;
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int dm;
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} usb_internal_phy_io_t;
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/**
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* @brief USB Controller Information
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*
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* Structure to store information for all USB-DWC instances
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*
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* For targets with multiple USB controllers, we support only fixed mapping of the PHYs.
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* This is a software limitation; the hardware supports swapping Controllers and PHYs.
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*/
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typedef struct {
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struct {
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const usb_fsls_serial_signal_conn_t * const fsls_signals; // Must be set if external PHY is supported by controller
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const usb_otg_signal_conn_t * const otg_signals;
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const usb_internal_phy_io_t * const internal_phy_io; // Must be set for internal FSLS PHY(s)
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const int irq;
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const int irq_2nd_cpu; // The USB-DWC can provide 2nd interrupt so each CPU can have its own interrupt line. Set to -1 if not supported
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} controllers [SOC_USB_OTG_PERIPH_NUM];
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@ -85,6 +94,8 @@ extern const usb_dwc_info_t usb_dwc_info;
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/* ------------------------------- Deprecated ------------------------------- */
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/* Todo: Remove in ESP-IDF v6.0 (IDF-9052) */
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#include <stdint.h>
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#include "soc/periph_defs.h"
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#if SOC_USB_OTG_SUPPORTED
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@ -369,12 +369,11 @@ esp_err_t usb_new_phy(const usb_phy_config_t *config, usb_phy_handle_t *handle_r
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}
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// For FSLS PHY that shares pads with GPIO peripheral, we must set drive capability to 3 (40mA)
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#if !CONFIG_IDF_TARGET_ESP32P4 // TODO: We must set drive capability for FSLS PHY for P4 too, to pass Full Speed eye diagram test
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if (phy_target == USB_PHY_TARGET_INT) {
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gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3);
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gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3);
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assert(usb_dwc_info.controllers[otg11_index].internal_phy_io);
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gpio_set_drive_capability(usb_dwc_info.controllers[otg11_index].internal_phy_io->dm, GPIO_DRIVE_CAP_3);
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gpio_set_drive_capability(usb_dwc_info.controllers[otg11_index].internal_phy_io->dp, GPIO_DRIVE_CAP_3);
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}
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#endif
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*handle_ret = (usb_phy_handle_t) phy_context;
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if (phy_target == USB_PHY_TARGET_EXT) {
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