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https://github.com/espressif/esp-idf
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Merge branch 'feature/usb_esp32s3_add_host_support' into 'master'
usb/hal/soc: add USB Host support on ESP32-S3 Closes IDF-2713 See merge request espressif/esp-idf!13522
This commit is contained in:
commit
e25e02e06d
@ -37,4 +37,5 @@ PROVIDE ( DMA = 0x6003F000 );
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PROVIDE ( APB_SARADC = 0x60040000 );
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PROVIDE ( APB_SARADC = 0x60040000 );
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PROVIDE ( LCD_CAM = 0x60041000 );
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PROVIDE ( LCD_CAM = 0x60041000 );
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PROVIDE ( USB0 = 0x60080000 );
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PROVIDE ( USB0 = 0x60080000 );
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PROVIDE ( USBH = 0x60080000 );
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PROVIDE ( USB_WRAP = 0x60039000 );
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PROVIDE ( USB_WRAP = 0x60039000 );
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@ -66,7 +66,7 @@ if(NOT BOOTLOADER_BUILD)
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"esp32s2/touch_sensor_hal.c"
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"esp32s2/touch_sensor_hal.c"
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"esp32s2/dac_hal.c"
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"esp32s2/dac_hal.c"
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"esp32s2/interrupt_descriptor_table.c"
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"esp32s2/interrupt_descriptor_table.c"
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"esp32s2/usbh_hal.c")
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"usbh_hal.c")
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endif()
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endif()
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if(${target} STREQUAL "esp32s3")
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if(${target} STREQUAL "esp32s3")
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@ -81,7 +81,8 @@ if(NOT BOOTLOADER_BUILD)
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"usb_hal.c"
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"usb_hal.c"
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"esp32s3/brownout_hal.c"
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"esp32s3/brownout_hal.c"
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"esp32s3/interrupt_descriptor_table.c"
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"esp32s3/interrupt_descriptor_table.c"
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"esp32s3/touch_sensor_hal.c")
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"esp32s3/touch_sensor_hal.c"
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"usbh_hal.c")
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endif()
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endif()
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if(${target} STREQUAL "esp32c3")
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if(${target} STREQUAL "esp32c3")
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@ -2,7 +2,7 @@ COMPONENT_SRCDIRS := . esp32
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COMPONENT_ADD_INCLUDEDIRS := esp32/include include
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COMPONENT_ADD_INCLUDEDIRS := esp32/include include
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COMPONENT_ADD_LDFRAGMENTS += linker.lf
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COMPONENT_ADD_LDFRAGMENTS += linker.lf
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COMPONENT_OBJEXCLUDE += ./spi_slave_hd_hal.o ./spi_flash_hal_gpspi.o ./spi_slave_hd_hal.o ./ds_hal.o ./gdma_hal.o ./lcd_hal.o ./systimer_hal.o ./usb_hal.o
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COMPONENT_OBJEXCLUDE += ./spi_slave_hd_hal.o ./spi_flash_hal_gpspi.o ./spi_slave_hd_hal.o ./ds_hal.o ./gdma_hal.o ./lcd_hal.o ./systimer_hal.o ./usb_hal.o ./usbh_hal.o
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ifndef CONFIG_ETH_USE_ESP32_EMAC
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ifndef CONFIG_ETH_USE_ESP32_EMAC
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COMPONENT_OBJEXCLUDE += esp32/emac_hal.o
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COMPONENT_OBJEXCLUDE += esp32/emac_hal.o
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@ -495,7 +495,7 @@ static inline bool usbh_hal_port_check_if_connected(usbh_hal_context_t *hal)
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* @note This function should only be called after confirming that a device is connected to the host port
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* @note This function should only be called after confirming that a device is connected to the host port
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*
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*
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* @param hal Context of the HAL layer
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* @param hal Context of the HAL layer
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* @return usb_priv_speed_t Speed of the connected device (FS or LS only on the esp32-s2)
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* @return usb_priv_speed_t Speed of the connected device (FS or LS only on the esp32-s2 and esp32-s3)
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*/
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*/
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static inline usb_priv_speed_t usbh_hal_port_get_conn_speed(usbh_hal_context_t *hal)
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static inline usb_priv_speed_t usbh_hal_port_get_conn_speed(usbh_hal_context_t *hal)
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{
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{
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@ -443,13 +443,13 @@ static inline void usbh_ll_hcfg_set_fsls_pclk_sel(usbh_dev_t *hw)
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static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
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static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
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{
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{
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hw->hcfg_reg.descdma = 1; //Enable scatt/gatt
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hw->hcfg_reg.descdma = 1; //Enable scatt/gatt
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hw->hcfg_reg.fslssupp = 1; //FS/LS supp only
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hw->hcfg_reg.fslssupp = 1; //FS/LS support only
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/*
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/*
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Indicate to the OTG core what speed the PHY clock is at
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Indicate to the OTG core what speed the PHY clock is at
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Note: It seems like our PHY has an implicit 8 divider applied when in LS mode,
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Note: It seems like our PHY has an implicit 8 divider applied when in LS mode,
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so the values of FSLSPclkSel and FrInt have to be adjusted accordingly.
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so the values of FSLSPclkSel and FrInt have to be adjusted accordingly.
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*/
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*/
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hw->hcfg_reg.fslspclksel = (speed == USB_PRIV_SPEED_FULL) ? 1 : 2; //esp32-s2 only supports FS or LS
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hw->hcfg_reg.fslspclksel = (speed == USB_PRIV_SPEED_FULL) ? 1 : 2; //PHY clock on esp32-sx for FS/LS-only
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hw->hcfg_reg.perschedena = 0; //Disable perio sched
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hw->hcfg_reg.perschedena = 0; //Disable perio sched
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}
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}
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@ -465,7 +465,7 @@ static inline void usbh_ll_hfir_set_defaults(usbh_dev_t *hw, usb_priv_speed_t sp
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Note: It seems like our PHY has an implicit 8 divider applied when in LS mode,
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Note: It seems like our PHY has an implicit 8 divider applied when in LS mode,
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so the values of FSLSPclkSel and FrInt have to be adjusted accordingly.
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so the values of FSLSPclkSel and FrInt have to be adjusted accordingly.
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*/
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*/
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hfir.frint = (speed == USB_PRIV_SPEED_FULL) ? 48000 : 6000; //esp32-s2 only supports FS or LS
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hfir.frint = (speed == USB_PRIV_SPEED_FULL) ? 48000 : 6000; //esp32-sx targets only support FS or LS
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hw->hfir_reg.val = hfir.val;
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hw->hfir_reg.val = hfir.val;
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}
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}
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@ -550,7 +550,7 @@ static inline uint32_t usbh_ll_get_frame_list_base_addr(usbh_dev_t *hw)
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static inline usb_priv_speed_t usbh_ll_hprt_get_speed(usbh_dev_t *hw)
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static inline usb_priv_speed_t usbh_ll_hprt_get_speed(usbh_dev_t *hw)
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{
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{
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usb_priv_speed_t speed;
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usb_priv_speed_t speed;
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//esp32-s2 only supports FS or LS
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//esp32-s2 and esp32-s3 only support FS or LS
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switch (hw->hprt_reg.prtspd) {
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switch (hw->hprt_reg.prtspd) {
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case 1:
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case 1:
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speed = USB_PRIV_SPEED_FULL;
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speed = USB_PRIV_SPEED_FULL;
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@ -16,6 +16,7 @@
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#include <stdint.h>
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#include <stdint.h>
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#include <assert.h>
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#include <assert.h>
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#include <string.h>
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#include <string.h>
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#include "sdkconfig.h"
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#include "hal/usbh_hal.h"
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#include "hal/usbh_hal.h"
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#include "hal/usbh_ll.h"
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#include "hal/usbh_ll.h"
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@ -70,7 +71,7 @@
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* - Those bits proxy their interrupt through the USBH_LL_INTR_CHAN_CHHLTD bit
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* - Those bits proxy their interrupt through the USBH_LL_INTR_CHAN_CHHLTD bit
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* - USBH_LL_INTR_CHAN_XCS_XACT_ERR is always unmasked
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* - USBH_LL_INTR_CHAN_XCS_XACT_ERR is always unmasked
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* - When USBH_LL_INTR_CHAN_BNAINTR occurs, USBH_LL_INTR_CHAN_CHHLTD will NOT.
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* - When USBH_LL_INTR_CHAN_BNAINTR occurs, USBH_LL_INTR_CHAN_CHHLTD will NOT.
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* - USBH_LL_INTR_CHAN_AHBERR doesn't actually ever happen on our system )i.e., ESP32S2 and later):
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* - USBH_LL_INTR_CHAN_AHBERR doesn't actually ever happen on our system (i.e., ESP32-S2, ESP32-S3):
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* - If the QTD list's starting address is an invalid address (e.g., NULL), the core will attempt to fetch that
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* - If the QTD list's starting address is an invalid address (e.g., NULL), the core will attempt to fetch that
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* address for a transfer descriptor and probably gets all zeroes. It will interpret the zero as a bad QTD and
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* address for a transfer descriptor and probably gets all zeroes. It will interpret the zero as a bad QTD and
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* return a USBH_LL_INTR_CHAN_BNAINTR instead.
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* return a USBH_LL_INTR_CHAN_BNAINTR instead.
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@ -94,7 +95,11 @@ static void set_defaults(usbh_hal_context_t *hal)
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usbh_ll_internal_phy_conf(hal->wrap_dev); //Enable and configure internal PHY
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usbh_ll_internal_phy_conf(hal->wrap_dev); //Enable and configure internal PHY
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//GAHBCFG register
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//GAHBCFG register
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usb_ll_en_dma_mode(hal->dev);
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usb_ll_en_dma_mode(hal->dev);
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usb_ll_set_hbstlen(hal->dev, 1); //Use INCR AHB burst. MUST DO SO IN ESP32-S2 DUE TO ARBITER ERRATA.
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#ifdef CONFIG_IDF_TARGET_ESP32S2
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usb_ll_set_hbstlen(hal->dev, 1); //Use INCR AHB burst. See the ESP32-S2 and later chip ERRATA.
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#elif CONFIG_IDF_TARGET_ESP32S3
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usb_ll_set_hbstlen(hal->dev, 0); //Do not use USB burst INCR mode for the ESP32-S3, to avoid interference with other peripherals.
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#endif
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//GUSBCFG register
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//GUSBCFG register
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usb_ll_dis_hnp_cap(hal->dev); //Disable HNP
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usb_ll_dis_hnp_cap(hal->dev); //Disable HNP
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usb_ll_dis_srp_cap(hal->dev); //Disable SRP
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usb_ll_dis_srp_cap(hal->dev); //Disable SRP
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1163
components/soc/esp32s3/include/soc/usbh_struct.h
Normal file
1163
components/soc/esp32s3/include/soc/usbh_struct.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -1,7 +1,7 @@
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idf_build_get_property(target IDF_TARGET)
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idf_build_get_property(target IDF_TARGET)
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#USB Host is currently only supported on ESP32-S2
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#USB Host is currently only supported on ESP32-S2, ESP32S3 chips
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if(NOT "${target}" STREQUAL "esp32s2")
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if(NOT "${target}" MATCHES "^esp32s[2-3]")
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return()
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return()
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endif()
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endif()
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@ -1,7 +1,7 @@
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idf_build_get_property(target IDF_TARGET)
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idf_build_get_property(target IDF_TARGET)
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#USB Host is currently only supported on ESP32-S2
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#USB Host is currently only supported on ESP32-S2, ESP32S3 chips
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if(NOT "${target}" STREQUAL "esp32s2")
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if(NOT "${target}" MATCHES "^esp32s[2-3]")
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return()
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return()
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endif()
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endif()
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