blackbeard420/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf synced 2025-03-09 17:19:09 -04:00
Code Issues Projects Releases Wiki Activity

Merge branch 'bugfix/esp32s2_memprot_clear' into 'master'

Browse Source 
fix(esp_hw_support): clear the memory protection interrupt status on boot

Closes IDFGH-5968 and IDFGH-14602

See merge request espressif/esp-idf!36801
This commit is contained in:
Mahavir Jain 2025-02-27 12:54:06 +08:00
commit e81a9285fe
1 changed files with 9 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
components/esp_hw_support/port/esp32s2/memprot.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -787,6 +787,13 @@ esp_err_t esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uin
bool use_peri1 = required_mem_prot & MEMPROT_PERI1_RTCSLOW;
bool use_peri2 = required_mem_prot & MEMPROT_PERI2_RTCSLOW_0 || required_mem_prot & MEMPROT_PERI2_RTCSLOW_1;
// make sure there is no pending interrupt, this may be the case if the target just rebooted
// after a memory protection fault.
memprot_ll_iram0_clear_intr();
memprot_ll_dram0_clear_intr();
memprot_ll_peri1_clear_intr();
memprot_ll_peri2_clear_intr();
//disable protection
if (use_iram0 && (ret = esp_memprot_intr_ena(MEMPROT_IRAM0_SRAM, false)) != ESP_OK) {
return ret;
@ -865,7 +872,7 @@ esp_err_t esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uin
}
}
//reenable protection (bus based)
//re-enable protection (bus based)
if (use_iram0 && (ret = esp_memprot_intr_ena(MEMPROT_IRAM0_SRAM, true)) != ESP_OK) {
return ret;
}