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https://github.com/espressif/esp-idf
synced 2025-03-10 01:29:21 -04:00
feat(ecc): enable ECC constant time mode for ESP32-H2 ECO5
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@ -95,6 +95,19 @@ static esp_err_t init_efuse_secure(void)
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}
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#endif
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#if CONFIG_ESP_CRYPTO_FORCE_ECC_CONSTANT_TIME_POINT_MUL
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bool force_constant_time = true;
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#if CONFIG_IDF_TARGET_ESP32H2
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if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 102)) {
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force_constant_time = false;
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}
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#endif
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if (!esp_efuse_read_field_bit(ESP_EFUSE_ECC_FORCE_CONST_TIME) && force_constant_time) {
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ESP_EARLY_LOGD(TAG, "Forcefully enabling ECC constant time operations");
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ESP_RETURN_ON_ERROR(esp_efuse_write_field_bit(ESP_EFUSE_ECC_FORCE_CONST_TIME), TAG, "Failed to enable ECC constant time operations");
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}
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#endif
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#if CONFIG_SECURE_DISABLE_ROM_DL_MODE
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// Permanently disable ROM download mode
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ESP_RETURN_ON_ERROR(esp_efuse_disable_rom_download_mode(), TAG, "Failed to disable ROM download mode");
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@ -325,6 +325,20 @@ menu "Hardware Settings"
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endmenu
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config ESP_CRYPTO_FORCE_ECC_CONSTANT_TIME_POINT_MUL
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bool "Forcefully enable ECC constant time point multiplication operations"
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depends on SOC_ECC_CONSTANT_TIME_POINT_MUL
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default N
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help
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If enabled, the app startup code will burn the ECC_FORCE_CONST_TIME efuse bit to force the
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ECC peripheral to always perform constant time point multiplication operations,
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irrespective of the ECC_MULT_SECURITY_MODE status bit that is present in the ECC_MULT_CONF_REG
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register. By default, ESP-IDF configures the ECC peripheral to perform constant time point
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multiplication operations, so enabling this config would provide security enhancement only in
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the cases when trusted boot is not enabled and the attacker tries carrying out non-constant
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time point multiplication operations by changing the default ESP-IDF configurations.
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Performing constant time operations protect the ECC multiplication operations from timing attacks.
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orsource "./port/$IDF_TARGET/Kconfig.dcdc"
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orsource "./port/$IDF_TARGET/Kconfig.ldo"
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@ -15,6 +15,8 @@ choice ESP32H2_REV_MIN
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bool "Rev v0.1 (ECO1)"
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config ESP32H2_REV_MIN_2
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bool "Rev v0.2 (ECO2)"
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config ESP32H2_REV_MIN_102
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bool "Rev v1.2 (ECO5)"
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endchoice
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config ESP32H2_REV_MIN_FULL
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@ -22,6 +24,7 @@ config ESP32H2_REV_MIN_FULL
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default 0 if ESP32H2_REV_MIN_0
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default 1 if ESP32H2_REV_MIN_1
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default 2 if ESP32H2_REV_MIN_2
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default 102 if ESP32H2_REV_MIN_102
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config ESP_REV_MIN_FULL
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int
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@ -31,7 +34,7 @@ config ESP_REV_MIN_FULL
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# MAX Revision
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#
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comment "Maximum Supported ESP32-H2 Revision (Rev v0.99)"
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comment "Maximum Supported ESP32-H2 Revision (Rev v1.99)"
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# Maximum revision that IDF supports.
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# It can not be changed by user.
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# Only Espressif can change it when a new version will be supported in IDF.
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@ -105,8 +105,8 @@ menu "Hardware Abstraction Layer (HAL) and Low Level (LL)"
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config HAL_ECDSA_GEN_SIG_CM
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bool "Enable countermeasure for ECDSA signature generation"
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depends on IDF_TARGET_ESP32H2 && ESP32H2_REV_MIN_FULL < 102
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default n
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# ToDo - IDF-11051
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help
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Enable this option to apply the countermeasure for ECDSA signature operation
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This countermeasure masks the real ECDSA sign operation
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@ -177,3 +177,8 @@ int ecc_hal_read_mod_op_result(uint8_t *r, uint16_t len)
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}
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#endif /* SOC_ECC_EXTENDED_MODES_SUPPORTED */
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void ecc_hal_enable_constant_time_point_mul(bool enable)
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{
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ecc_ll_enable_constant_time_point_mul(enable);
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}
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -171,6 +171,12 @@ static inline void ecc_ll_read_param(ecc_ll_param_t param, uint8_t *buf, uint16_
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memcpy(buf, (void *)reg, len);
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}
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static inline void ecc_ll_enable_constant_time_point_mul(bool enable)
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{
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// Not supported for ESP32-C2
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(void) enable; //unused
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}
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#ifdef __cplusplus
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}
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#endif
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@ -173,6 +173,12 @@ static inline void ecc_ll_read_param(ecc_ll_param_t param, uint8_t *buf, uint16_
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memcpy(buf, (void *)reg, len);
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}
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static inline void ecc_ll_enable_constant_time_point_mul(bool enable)
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{
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// Not supported for ESP32-C6
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(void) enable; //unused
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}
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#ifdef __cplusplus
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}
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#endif
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@ -12,6 +12,8 @@
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#include "soc/ecc_mult_reg.h"
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#include "soc/pcr_struct.h"
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#include "soc/pcr_reg.h"
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#include "soc/chip_revision.h"
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#include "hal/efuse_ll.h"
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#ifdef __cplusplus
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extern "C" {
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@ -211,6 +213,18 @@ static inline ecc_mod_base_t ecc_ll_get_mod_base(void)
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return (ecc_mod_base_t)(REG_GET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_MOD_BASE));
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}
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static inline void ecc_ll_enable_constant_time_point_mul(bool enable)
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{
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// ECC constant time point multiplication is supported only on rev 1.2 and above
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if ((efuse_ll_get_chip_wafer_version_major() >= 1) && (efuse_ll_get_chip_wafer_version_minor() >= 2)) {
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if (enable) {
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REG_SET_BIT(ECC_MULT_CONF_REG, ECC_MULT_SECURITY_MODE);
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} else {
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REG_CLR_BIT(ECC_MULT_CONF_REG, ECC_MULT_SECURITY_MODE);
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}
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}
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}
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static inline void ecc_ll_read_param(ecc_ll_param_t param, uint8_t *buf, uint16_t len)
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{
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uint32_t reg;
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -240,6 +240,12 @@ static inline void ecc_ll_read_param(ecc_ll_param_t param, uint8_t *buf, uint16_
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memcpy(buf, (void *)reg, len);
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}
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static inline void ecc_ll_enable_constant_time_point_mul(bool enable)
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{
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// Not supported for ESP32-P4
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(void) enable; //unused
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}
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#ifdef __cplusplus
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}
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#endif
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@ -195,6 +195,13 @@ int ecc_hal_read_mod_op_result(uint8_t *r, uint16_t len);
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#endif /* SOC_ECC_EXTENDED_MODES_SUPPORTED */
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/**
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* @brief Enable constant time multiplication operations
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*
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* @param true: enable; false: disable
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*/
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void ecc_hal_enable_constant_time_point_mul(bool enable);
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#ifdef __cplusplus
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}
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#endif
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@ -86,6 +86,7 @@ static void ecc_point_mul(const uint8_t *k_le, const uint8_t *x_le, const uint8_
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} else {
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ecc_hal_set_mode(ECC_MODE_POINT_MUL);
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}
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ecc_hal_enable_constant_time_point_mul(true);
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ecc_hal_start_calc();
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while (!ecc_hal_is_calc_finished()) {
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@ -160,6 +161,74 @@ TEST(ecc, ecc_point_multiplication_on_SECP192R1_and_SECP256R1)
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{
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test_ecc_point_mul_inner(false);
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}
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#if SOC_ECC_CONSTANT_TIME_POINT_MUL || (CONFIG_IDF_TARGET_ESP32H2 && CONFIG_ESP32H2_REV_MIN_FULL >= 102)
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#define CONST_TIME_DEVIATION_PERCENT 0.002
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static void test_ecc_point_mul_inner_constant_time(void)
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{
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uint8_t scalar_le[32];
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uint8_t x_le[32];
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uint8_t y_le[32];
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/* P256 */
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ecc_be_to_le(ecc_p256_scalar, scalar_le, 32);
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ecc_be_to_le(ecc_p256_point_x, x_le, 32);
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ecc_be_to_le(ecc_p256_point_y, y_le, 32);
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uint8_t x_res_le[32];
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uint8_t y_res_le[32];
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double deviation = 0;
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uint32_t elapsed_time, mean_elapsed_time, total_elapsed_time = 0;
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uint32_t max_time = 0, min_time = UINT32_MAX;
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int loop_count = 10;
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for (int i = 0; i < loop_count; i++) {
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ccomp_timer_start();
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ecc_point_mul(scalar_le, x_le, y_le, 32, 0, x_res_le, y_res_le);
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elapsed_time = ccomp_timer_stop();
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max_time = MAX(elapsed_time, max_time);
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min_time = MIN(elapsed_time, min_time);
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total_elapsed_time += elapsed_time;
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}
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mean_elapsed_time = total_elapsed_time / loop_count;
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deviation = ((double)(max_time - mean_elapsed_time) / mean_elapsed_time);
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TEST_ASSERT_LESS_THAN_DOUBLE(CONST_TIME_DEVIATION_PERCENT, deviation);
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/* P192 */
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ecc_be_to_le(ecc_p192_scalar, scalar_le, 24);
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ecc_be_to_le(ecc_p192_point_x, x_le, 24);
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ecc_be_to_le(ecc_p192_point_y, y_le, 24);
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max_time = 0;
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min_time = UINT32_MAX;
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total_elapsed_time = 0;
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for (int i = 0; i < loop_count; i++) {
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ccomp_timer_start();
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ecc_point_mul(scalar_le, x_le, y_le, 24, 0, x_res_le, y_res_le);
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elapsed_time = ccomp_timer_stop();
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max_time = MAX(elapsed_time, max_time);
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min_time = MIN(elapsed_time, min_time);
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total_elapsed_time += elapsed_time;
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}
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mean_elapsed_time = total_elapsed_time / loop_count;
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deviation = ((double)(max_time - mean_elapsed_time) / mean_elapsed_time);
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TEST_ASSERT_LESS_THAN_DOUBLE(CONST_TIME_DEVIATION_PERCENT, deviation);
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}
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TEST(ecc, ecc_point_multiplication_const_time_check_on_SECP192R1_and_SECP256R1)
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{
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test_ecc_point_mul_inner_constant_time();
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}
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#endif
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#endif
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#if SOC_ECC_SUPPORT_POINT_VERIFY && !defined(SOC_ECC_SUPPORT_POINT_VERIFY_QUIRK)
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@ -493,6 +562,9 @@ TEST_GROUP_RUNNER(ecc)
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{
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#if SOC_ECC_SUPPORT_POINT_MULT
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RUN_TEST_CASE(ecc, ecc_point_multiplication_on_SECP192R1_and_SECP256R1);
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#if SOC_ECC_CONSTANT_TIME_POINT_MUL || (CONFIG_IDF_TARGET_ESP32H2 && CONFIG_ESP32H2_REV_MIN_FULL >= 102)
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RUN_TEST_CASE(ecc, ecc_point_multiplication_const_time_check_on_SECP192R1_and_SECP256R1);
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#endif
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#endif
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#if SOC_ECC_SUPPORT_POINT_VERIFY && !defined(SOC_ECC_SUPPORT_POINT_VERIFY_QUIRK)
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@ -586,11 +586,10 @@ menu "mbedTLS"
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menu "Enable Software Countermeasure for ECDSA signing using on-chip ECDSA peripheral"
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depends on MBEDTLS_HARDWARE_ECDSA_SIGN
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depends on IDF_TARGET_ESP32H2
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depends on IDF_TARGET_ESP32H2 && ESP32H2_REV_MIN_FULL < 102
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config MBEDTLS_HARDWARE_ECDSA_SIGN_MASKING_CM
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bool "Mask original ECDSA sign operation under dummy sign operations"
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select HAL_ECDSA_GEN_SIG_CM
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# ToDo: IDF-11051
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default y
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help
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The ECDSA peripheral before ECO5 does not offer constant time ECDSA sign operation.
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@ -44,6 +44,14 @@ int esp_ecc_point_multiply(const ecc_point_t *point, const uint8_t *scalar, ecc_
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ecc_hal_write_mul_param(scalar, point->x, point->y, len);
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ecc_hal_set_mode(work_mode);
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/*
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* Enable constant-time point multiplication operations for the ECC hardware accelerator,
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* if supported for the given target. This protects the ECC multiplication operation from
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* timing attacks. This increases the time taken (by almost 50%) for some point
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* multiplication operations performed by the ECC hardware accelerator.
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*/
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ecc_hal_enable_constant_time_point_mul(true);
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ecc_hal_start_calc();
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memset(result, 0, sizeof(ecc_point_t));
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@ -1239,6 +1239,10 @@ config SOC_CRYPTO_DPA_PROTECTION_SUPPORTED
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bool
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default y
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config SOC_ECC_CONSTANT_TIME_POINT_MUL
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bool
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default y
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config SOC_ECDSA_USES_MPI
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bool
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default y
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/*------------------------ Anti DPA (Security) CAPS --------------------------*/
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#define SOC_CRYPTO_DPA_PROTECTION_SUPPORTED 1
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/*--------------------------- ECC CAPS ---------------------------------------*/
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#define SOC_ECC_CONSTANT_TIME_POINT_MUL 1
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/*------------------------- ECDSA CAPS -------------------------*/
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#define SOC_ECDSA_USES_MPI (1)
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