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Merge branch 'bugfix/c5_mpi_ecc_power_mode_v5.1' into 'release/v5.1'

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fix(hal): correct mpi/ecc peripheral power up sequence for ESP32-C5 (v5.1)

See merge request espressif/esp-idf!31866
This commit is contained in:
Mahavir Jain 2024-07-17 13:03:01 +08:00
commit ef80a09a4d
6 changed files with 43 additions and 3 deletions
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3
components/hal/esp32c2/include/hal/ecc_ll.h
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@ -20,6 +20,9 @@ typedef enum {
ECC_PARAM_K,
} ecc_ll_param_t;
static inline void ecc_ll_power_up(void) {}
static inline void ecc_ll_power_down(void) {}
static inline void ecc_ll_enable_interrupt(void)
{
REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1);

16
components/hal/esp32c6/include/hal/ecc_ll.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -9,6 +9,8 @@
#include <string.h>
#include "hal/assert.h"
#include "soc/ecc_mult_reg.h"
#include "soc/pcr_struct.h"
#include "soc/pcr_reg.h"
#ifdef __cplusplus
extern "C" {
@ -20,6 +22,18 @@ typedef enum {
ECC_PARAM_K,
} ecc_ll_param_t;
static inline void ecc_ll_power_up(void)
{
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD);
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD);
}
static inline void ecc_ll_power_down(void)
{
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PU);
REG_SET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD);
}
static inline void ecc_ll_enable_interrupt(void)
{
REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1);

17
components/hal/esp32h2/include/hal/ecc_ll.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -8,7 +8,10 @@
#include <stdbool.h>
#include <string.h>
#include "hal/assert.h"
#include "hal/ecc_types.h"
#include "soc/ecc_mult_reg.h"
#include "soc/pcr_struct.h"
#include "soc/pcr_reg.h"
#ifdef __cplusplus
extern "C" {
@ -23,6 +26,18 @@ typedef enum {
ECC_PARAM_QZ,
} ecc_ll_param_t;
static inline void ecc_ll_power_up(void)
{
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD);
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD);
}
static inline void ecc_ll_power_down(void)
{
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PU);
REG_SET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD);
}
static inline void ecc_ll_enable_interrupt(void)
{
REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1);

4
components/hal/test_apps/ecc/main/test_ecc.c
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: CC0-1.0
*/
@ -12,6 +12,7 @@
#include "test_params.h"
#include "soc/soc_caps.h"
#include "hal/ecc_hal.h"
#include "hal/ecc_ll.h"
#include "hal/clk_gate_ll.h"
#include "unity.h"
@ -43,6 +44,7 @@ static void ecc_be_to_le(const uint8_t* be_point, uint8_t *le_point, uint8_t len
static void ecc_enable_and_reset(void)
{
periph_ll_enable_clk_clear_rst(PERIPH_ECC_MODULE);
ecc_ll_power_up();
}
#if SOC_ECC_SUPPORT_POINT_MULT

3
components/mbedtls/port/ecc/esp_ecc.c
View File

@ -11,17 +11,20 @@
#include "esp_private/periph_ctrl.h"
#include "ecc_impl.h"
#include "hal/ecc_hal.h"
#include "hal/ecc_ll.h"
static void esp_ecc_acquire_hardware(void)
{
esp_crypto_ecc_lock_acquire();
periph_module_enable(PERIPH_ECC_MODULE);
ecc_ll_power_up();
}
static void esp_ecc_release_hardware(void)
{
periph_module_disable(PERIPH_ECC_MODULE);
ecc_ll_power_down();
esp_crypto_ecc_lock_release();
}

3
components/mbedtls/port/ecdsa/ecdsa_alt.c
View File

@ -14,6 +14,7 @@
#include "mbedtls/platform_util.h"
#include "esp_private/periph_ctrl.h"
#include "ecdsa/ecdsa_alt.h"
#include "hal/ecc_ll.h"
#define ECDSA_KEY_MAGIC (short) 0xECD5A
#define ECDSA_SHA_LEN 32
@ -26,11 +27,13 @@ static void esp_ecdsa_acquire_hardware(void)
esp_crypto_ecdsa_lock_acquire();
periph_module_enable(PERIPH_ECDSA_MODULE);
ecc_ll_power_up();
}
static void esp_ecdsa_release_hardware(void)
{
periph_module_disable(PERIPH_ECDSA_MODULE);
ecc_ll_power_down();
esp_crypto_ecdsa_lock_release();
}