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feat(dw_gdma): support change link list item connection

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by dw_gdma_lli_set_next
This commit is contained in:
morris 2024-02-02 16:35:55 +08:00
parent 12de4603c0
commit f0342d6b59
3 changed files with 28 additions and 1 deletions
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10
components/esp_hw_support/dma/dw_gdma.c
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@ -470,6 +470,16 @@ dw_gdma_lli_handle_t dw_gdma_link_list_get_item(dw_gdma_link_list_handle_t list,
return lli;
}
esp_err_t dw_gdma_lli_set_next(dw_gdma_lli_handle_t lli, dw_gdma_lli_handle_t next)
{
ESP_RETURN_ON_FALSE(lli && next, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
// the next field must use a cached address
dw_gdma_ll_lli_set_next_item_addr(lli, CACHE_LL_L2MEM_CACHE_ADDR(next));
return ESP_OK;
}
esp_err_t dw_gdma_channel_config_transfer(dw_gdma_channel_handle_t chan, const dw_gdma_block_transfer_config_t *config)
{
ESP_RETURN_ON_FALSE(chan && config, ESP_ERR_INVALID_ARG, TAG, "invalid argument");

12
components/esp_hw_support/dma/include/esp_private/dw_gdma.h
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@ -363,6 +363,18 @@ dw_gdma_lli_handle_t dw_gdma_link_list_get_item(dw_gdma_link_list_handle_t list,
*/
esp_err_t dw_gdma_lli_config_transfer(dw_gdma_lli_handle_t lli, dw_gdma_block_transfer_config_t *config);
/**
* @brief Set the next link list item for a given DMA link list item
*
* @param[in] lli Link list item
* @param[in] next Next link list item
* @return
* - ESP_OK: Set next link list item successfully
* - ESP_ERR_INVALID_ARG: Set next link list item failed because of invalid argument
* - ESP_FAIL: Set next link list item failed because of other error
*/
esp_err_t dw_gdma_lli_set_next(dw_gdma_lli_handle_t lli, dw_gdma_lli_handle_t next);
/**
* @brief Markers of a DW_GDMA block
*/

7
components/hal/esp32p4/include/hal/cache_ll.h
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@ -25,6 +25,12 @@ extern "C" {
*/
#define CACHE_LL_L2MEM_NON_CACHE_ADDR(addr) ((intptr_t)(addr) + SOC_NON_CACHEABLE_OFFSET)
/**
* @brief Given a non-cacheable address, get the corresponding L2MEM cached address
* @example 0x8FF0_0000 => 0x4FF0_0000
*/
#define CACHE_LL_L2MEM_CACHE_ADDR(non_cache_addr) ((intptr_t)(non_cache_addr) - SOC_NON_CACHEABLE_OFFSET)
/**
* Cache capabilities
*/
@ -44,7 +50,6 @@ extern "C" {
//TODO: IDF-7515
#define CACHE_LL_L1_ACCESS_EVENT_MASK (0x3f)
/*------------------------------------------------------------------------------
* Autoload
*----------------------------------------------------------------------------*/