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https://github.com/espressif/esp-idf
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Merge branch 'fix/esp_mmu_vaddr_to_paddr_cannot_figure_psram_p4' into 'master'
mmu: vaddr to paddr cannot figure psram vaddr on esp32p4 Closes IDF-12483 See merge request espressif/esp-idf!36957
This commit is contained in:
commit
f8ff9e47ed
@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@ -186,13 +186,6 @@ static void s_reserve_drom_region(mem_region_t *hw_mem_regions, int region_nums)
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}
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}
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#endif //#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
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#endif //#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
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#if SOC_MMU_PER_EXT_MEM_TARGET
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FORCE_INLINE_ATTR uint32_t s_get_mmu_id_from_target(mmu_target_t target)
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{
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return (target == MMU_TARGET_FLASH0) ? MMU_LL_FLASH_MMU_ID : MMU_LL_PSRAM_MMU_ID;
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}
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#endif
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void esp_mmu_map_init(void)
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void esp_mmu_map_init(void)
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{
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{
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mem_region_t hw_mem_regions[SOC_MMU_LINEAR_ADDRESS_REGION_NUM] = {};
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mem_region_t hw_mem_regions[SOC_MMU_LINEAR_ADDRESS_REGION_NUM] = {};
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@ -393,7 +386,7 @@ static void IRAM_ATTR NOINLINE_ATTR s_do_cache_invalidate(uint32_t vaddr_start,
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FORCE_INLINE_ATTR uint32_t s_mapping_operation(mmu_target_t target, uint32_t vaddr_start, esp_paddr_t paddr_start, uint32_t size)
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FORCE_INLINE_ATTR uint32_t s_mapping_operation(mmu_target_t target, uint32_t vaddr_start, esp_paddr_t paddr_start, uint32_t size)
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{
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{
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uint32_t actual_mapped_len = 0;
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uint32_t actual_mapped_len = 0;
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uint32_t mmu_id = s_get_mmu_id_from_target(target);
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uint32_t mmu_id = mmu_hal_get_id_from_target(target);
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mmu_hal_map_region(mmu_id, target, vaddr_start, paddr_start, size, &actual_mapped_len);
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mmu_hal_map_region(mmu_id, target, vaddr_start, paddr_start, size, &actual_mapped_len);
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return actual_mapped_len;
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return actual_mapped_len;
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@ -599,7 +592,7 @@ err:
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FORCE_INLINE_ATTR void s_unmapping_operation(uint32_t vaddr_start, uint32_t size)
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FORCE_INLINE_ATTR void s_unmapping_operation(uint32_t vaddr_start, uint32_t size)
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{
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{
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mmu_target_t target = mmu_ll_vaddr_to_target(vaddr_start);
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mmu_target_t target = mmu_ll_vaddr_to_target(vaddr_start);
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uint32_t mmu_id = s_get_mmu_id_from_target(target);
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uint32_t mmu_id = mmu_hal_get_id_from_target(target);
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mmu_hal_unmap_region(mmu_id, vaddr_start, size);
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mmu_hal_unmap_region(mmu_id, vaddr_start, size);
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}
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}
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#else
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#else
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@ -753,10 +746,14 @@ esp_err_t IRAM_ATTR esp_mmu_map_dump_mapped_blocks_private(void)
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---------------------------------------------------------------*/
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---------------------------------------------------------------*/
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static bool NOINLINE_ATTR IRAM_ATTR s_vaddr_to_paddr(uint32_t vaddr, esp_paddr_t *out_paddr, mmu_target_t *out_target)
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static bool NOINLINE_ATTR IRAM_ATTR s_vaddr_to_paddr(uint32_t vaddr, esp_paddr_t *out_paddr, mmu_target_t *out_target)
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{
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{
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uint32_t mmu_id = 0;
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//we call this for now, but this will be refactored to move out of `spi_flash`
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//we call this for now, but this will be refactored to move out of `spi_flash`
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spi_flash_disable_interrupts_caches_and_other_cpu();
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spi_flash_disable_interrupts_caches_and_other_cpu();
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bool is_mapped = mmu_hal_vaddr_to_paddr(0, vaddr, out_paddr, out_target);
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#if SOC_MMU_PER_EXT_MEM_TARGET
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#if SOC_MMU_PER_EXT_MEM_TARGET
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mmu_id = mmu_hal_get_id_from_vaddr(vaddr);
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#endif
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bool is_mapped = mmu_hal_vaddr_to_paddr(mmu_id, vaddr, out_paddr, out_target);
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#if SPIRAM_FLASH_LOAD_TO_PSRAM
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if (!is_mapped) {
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if (!is_mapped) {
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is_mapped = mmu_hal_vaddr_to_paddr(1, vaddr, out_paddr, out_target);
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is_mapped = mmu_hal_vaddr_to_paddr(1, vaddr, out_paddr, out_target);
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}
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}
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@ -789,7 +786,7 @@ static bool NOINLINE_ATTR IRAM_ATTR s_paddr_to_vaddr(esp_paddr_t paddr, mmu_targ
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spi_flash_disable_interrupts_caches_and_other_cpu();
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spi_flash_disable_interrupts_caches_and_other_cpu();
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uint32_t mmu_id = 0;
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uint32_t mmu_id = 0;
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#if SOC_MMU_PER_EXT_MEM_TARGET
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#if SOC_MMU_PER_EXT_MEM_TARGET
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mmu_id = s_get_mmu_id_from_target(target);
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mmu_id = mmu_hal_get_id_from_target(target);
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#endif
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#endif
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bool found = mmu_hal_paddr_to_vaddr(mmu_id, paddr, target, type, out_vaddr);
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bool found = mmu_hal_paddr_to_vaddr(mmu_id, paddr, target, type, out_vaddr);
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spi_flash_enable_interrupts_caches_and_other_cpu();
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spi_flash_enable_interrupts_caches_and_other_cpu();
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@ -10,6 +10,16 @@ set(COMPONENTS main esp_psram)
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include($ENV{IDF_PATH}/tools/cmake/project.cmake)
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include($ENV{IDF_PATH}/tools/cmake/project.cmake)
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project(mm_test)
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project(mm_test)
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string(JOIN "," ignore_refs)
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if(CONFIG_SOC_MMU_PER_EXT_MEM_TARGET AND CONFIG_SPIRAM_FLASH_LOAD_TO_PSRAM)
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# On SOC_MMU_PER_EXT_MEM_TARGET chips, when xip_psram, we need
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# - _instruction_reserved_start, _instruction_reserved_end
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# - _rodata_reserved_start, _rodata_reserved_end
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# to do some calculation. As we don't access the addresses, so we disable this check
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list(APPEND ignore_refs esp_mmu_map_init/*)
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endif()
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if(CONFIG_COMPILER_DUMP_RTL_FILES)
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if(CONFIG_COMPILER_DUMP_RTL_FILES)
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add_custom_target(check_test_app_sections ALL
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add_custom_target(check_test_app_sections ALL
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COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
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COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
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@ -18,6 +28,7 @@ if(CONFIG_COMPILER_DUMP_RTL_FILES)
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find-refs
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find-refs
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--from-sections=.iram0.text
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--from-sections=.iram0.text
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--to-sections=.flash.text,.flash.rodata
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--to-sections=.flash.text,.flash.rodata
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--ignore-refs=${ignore_refs}
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--exit-code
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--exit-code
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DEPENDS ${elf}
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DEPENDS ${elf}
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)
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)
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@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@ -70,3 +70,26 @@ TEST_CASE("Can find paddr caps by any paddr offset", "[mmu]")
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TEST_ESP_OK(esp_mmu_unmap(ptr0));
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TEST_ESP_OK(esp_mmu_unmap(ptr0));
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}
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}
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#if CONFIG_SPIRAM
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#if !CONFIG_IDF_TARGET_ESP32 //ESP32 doesn't support using `esp_mmu_map` to map to PSRAM
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TEST_CASE("Can find paddr when mapping to psram", "[mmu]")
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{
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esp_paddr_t paddr = 0;
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mmu_target_t target = MMU_TARGET_FLASH0;
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void *vaddr = NULL;
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esp_err_t err = ESP_FAIL;
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vaddr = heap_caps_malloc(10, MALLOC_CAP_SPIRAM);
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err = esp_mmu_vaddr_to_paddr(vaddr, &paddr, &target);
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if (err == ESP_OK) {
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ESP_LOGI("MMU", "Virtual Address: %p, Physical Address: 0x%lx, Target: %d", vaddr, paddr, target);
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} else {
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ESP_LOGE("MMU", "Failed to convert virtual address to physical address: %s", esp_err_to_name(err));
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}
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TEST_ASSERT(target == MMU_TARGET_PSRAM0);
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}
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#endif //#if !CONFIG_IDF_TARGET_ESP32
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#endif //#if CONFIG_SPIRAM
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@ -1,6 +1,5 @@
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# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: CC0-1.0
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# SPDX-License-Identifier: CC0-1.0
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import pytest
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import pytest
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from pytest_embedded import Dut
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from pytest_embedded import Dut
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@ -24,6 +23,7 @@ PSRAM_RELEASE_CONFIGS = [
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pytest.param('psram_release_esp32', marks=[pytest.mark.esp32]),
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pytest.param('psram_release_esp32', marks=[pytest.mark.esp32]),
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pytest.param('psram_release_esp32s2', marks=[pytest.mark.esp32s2]),
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pytest.param('psram_release_esp32s2', marks=[pytest.mark.esp32s2]),
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pytest.param('psram_release_esp32s3', marks=[pytest.mark.esp32s3]),
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pytest.param('psram_release_esp32s3', marks=[pytest.mark.esp32s3]),
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pytest.param('psram_release_esp32p4', marks=[pytest.mark.esp32p4]),
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]
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]
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@ -0,0 +1,6 @@
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CONFIG_IDF_TARGET="esp32p4"
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CONFIG_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
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CONFIG_SPIRAM=y
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@ -0,0 +1,7 @@
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CONFIG_IDF_TARGET="esp32p4"
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CONFIG_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_XIP_FROM_PSRAM=y
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@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
|
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
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*
|
*
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* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@ -84,6 +84,28 @@ static inline mmu_target_t mmu_ll_vaddr_to_target(uint32_t vaddr)
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return target;
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return target;
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}
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}
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|
/**
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* Convert MMU virtual address to MMU ID
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*
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* @param vaddr virtual address
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*
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* @return MMU ID
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*/
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__attribute__((always_inline))
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static inline uint32_t mmu_ll_vaddr_to_id(uint32_t vaddr)
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{
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uint32_t id = 0;
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if (vaddr >= SOC_DRAM_FLASH_ADDRESS_LOW && vaddr < SOC_DRAM_FLASH_ADDRESS_HIGH) {
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id = MMU_LL_FLASH_MMU_ID;
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} else if (vaddr >= SOC_DRAM_PSRAM_ADDRESS_LOW && vaddr < SOC_DRAM_PSRAM_ADDRESS_HIGH) {
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id = MMU_LL_PSRAM_MMU_ID;
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|
} else {
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|
HAL_ASSERT(0);
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|
}
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|
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|
return id;
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|
}
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|
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__attribute__((always_inline)) static inline bool mmu_ll_cache_encryption_enabled(void)
|
__attribute__((always_inline)) static inline bool mmu_ll_cache_encryption_enabled(void)
|
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{
|
{
|
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unsigned cnt = efuse_ll_get_flash_crypt_cnt();
|
unsigned cnt = efuse_ll_get_flash_crypt_cnt();
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
|
* SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*/
|
*/
|
||||||
@ -7,6 +7,7 @@
|
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#pragma once
|
#pragma once
|
||||||
|
|
||||||
#include <esp_types.h>
|
#include <esp_types.h>
|
||||||
|
#include "soc/soc_caps.h"
|
||||||
#include "hal/mmu_types.h"
|
#include "hal/mmu_types.h"
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
@ -118,6 +119,28 @@ bool mmu_hal_paddr_to_vaddr(uint32_t mmu_id, uint32_t paddr, mmu_target_t target
|
|||||||
*/
|
*/
|
||||||
bool mmu_hal_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint32_t len, mmu_vaddr_t type);
|
bool mmu_hal_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint32_t len, mmu_vaddr_t type);
|
||||||
|
|
||||||
|
#if SOC_MMU_PER_EXT_MEM_TARGET
|
||||||
|
/**
|
||||||
|
* Get MMU ID from MMU target
|
||||||
|
*
|
||||||
|
* @param target MMU target
|
||||||
|
*
|
||||||
|
* @return
|
||||||
|
* MMU ID
|
||||||
|
*/
|
||||||
|
uint32_t mmu_hal_get_id_from_target(mmu_target_t target);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Get MMU ID from vaddr
|
||||||
|
*
|
||||||
|
* @param vaddr Virtual address
|
||||||
|
*
|
||||||
|
* @return
|
||||||
|
* MMU ID
|
||||||
|
*/
|
||||||
|
uint32_t mmu_hal_get_id_from_vaddr(uint32_t vaddr);
|
||||||
|
#endif
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
|
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*/
|
*/
|
||||||
@ -161,3 +161,15 @@ bool mmu_hal_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start,
|
|||||||
{
|
{
|
||||||
return mmu_ll_check_valid_ext_vaddr_region(mmu_id, vaddr_start, len, type);
|
return mmu_ll_check_valid_ext_vaddr_region(mmu_id, vaddr_start, len, type);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#if SOC_MMU_PER_EXT_MEM_TARGET
|
||||||
|
uint32_t mmu_hal_get_id_from_target(mmu_target_t target)
|
||||||
|
{
|
||||||
|
return (target == MMU_TARGET_FLASH0) ? MMU_LL_FLASH_MMU_ID : MMU_LL_PSRAM_MMU_ID;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t mmu_hal_get_id_from_vaddr(uint32_t vaddr)
|
||||||
|
{
|
||||||
|
return mmu_ll_vaddr_to_id(vaddr);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
@ -36,6 +36,7 @@ components/spi_flash/test_apps/flash_mmap:
|
|||||||
- spi_flash
|
- spi_flash
|
||||||
enable:
|
enable:
|
||||||
- if: CONFIG_NAME in ["release", "rom_impl"] and IDF_TARGET in ["esp32", "esp32c2", "esp32c3", "esp32c5", "esp32c6", "esp32c61", "esp32h2", "esp32p4", "esp32s2", "esp32s3"]
|
- if: CONFIG_NAME in ["release", "rom_impl"] and IDF_TARGET in ["esp32", "esp32c2", "esp32c3", "esp32c5", "esp32c6", "esp32c61", "esp32h2", "esp32p4", "esp32s2", "esp32s3"]
|
||||||
|
- if: CONFIG_NAME == "psram" and SOC_MMU_PER_EXT_MEM_TARGET == 1 # MMU per target needs test. On unified MMU chips, the entry ID is unique
|
||||||
- if: CONFIG_NAME == "xip_psram" and IDF_TARGET in ["esp32s2", "esp32s3", "esp32p4"]
|
- if: CONFIG_NAME == "xip_psram" and IDF_TARGET in ["esp32s2", "esp32s3", "esp32p4"]
|
||||||
# S2 doesn't have ROM for flash
|
# S2 doesn't have ROM for flash
|
||||||
- if: CONFIG_NAME == "xip_psram_with_rom_impl" and IDF_TARGET in ["esp32s3", "esp32p4"]
|
- if: CONFIG_NAME == "xip_psram_with_rom_impl" and IDF_TARGET in ["esp32s3", "esp32p4"]
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
|
# SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
|
||||||
# SPDX-License-Identifier: Apache-2.0
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
import pytest
|
import pytest
|
||||||
from pytest_embedded import Dut
|
from pytest_embedded import Dut
|
||||||
@ -47,6 +47,19 @@ def test_flash_mmap_xip_psram(dut: Dut) -> None:
|
|||||||
dut.run_all_single_board_cases(timeout=30)
|
dut.run_all_single_board_cases(timeout=30)
|
||||||
|
|
||||||
|
|
||||||
|
@pytest.mark.supported_targets
|
||||||
|
@pytest.mark.generic
|
||||||
|
@pytest.mark.parametrize(
|
||||||
|
'config',
|
||||||
|
[
|
||||||
|
'psram',
|
||||||
|
],
|
||||||
|
indirect=True,
|
||||||
|
)
|
||||||
|
def test_flash_mmap_psram(dut: Dut) -> None:
|
||||||
|
dut.run_all_single_board_cases(timeout=30)
|
||||||
|
|
||||||
|
|
||||||
@pytest.mark.supported_targets
|
@pytest.mark.supported_targets
|
||||||
@pytest.mark.generic
|
@pytest.mark.generic
|
||||||
@pytest.mark.parametrize(
|
@pytest.mark.parametrize(
|
||||||
|
@ -0,0 +1 @@
|
|||||||
|
CONFIG_SPIRAM=y
|
Loading…
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Reference in New Issue
Block a user