From fedda1cb231fb2f75400b6eb226a88bf402b295c Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Mon, 10 Feb 2025 21:02:54 +0800 Subject: [PATCH] fix(esp_hw_support): fix esp32s2/esp32s3 RTC IOMUX clock management --- components/driver/gpio/rtc_io.c | 3 +- components/esp_hw_support/CMakeLists.txt | 4 ++ .../include/esp_private/io_mux.h | 42 +++++++++++++ .../esp_hw_support/port/esp32s2/io_mux.c | 61 +++++++++++++++++++ .../esp_hw_support/port/esp32s3/io_mux.c | 61 +++++++++++++++++++ .../esp_hw_support/port/esp32s3/rtc_clk.c | 3 +- components/esp_hw_support/sleep_modes.c | 8 ++- .../hal/esp32s2/include/hal/rtc_io_ll.h | 21 ++++--- .../hal/esp32s3/include/hal/rtc_io_ll.h | 18 ++++-- .../esp32s2/include/soc/Kconfig.soc_caps.in | 4 ++ components/soc/esp32s2/include/soc/soc_caps.h | 2 + .../esp32s3/include/soc/Kconfig.soc_caps.in | 4 ++ components/soc/esp32s3/include/soc/soc_caps.h | 2 + 13 files changed, 215 insertions(+), 18 deletions(-) create mode 100644 components/esp_hw_support/include/esp_private/io_mux.h create mode 100644 components/esp_hw_support/port/esp32s2/io_mux.c create mode 100644 components/esp_hw_support/port/esp32s3/io_mux.c diff --git a/components/driver/gpio/rtc_io.c b/components/driver/gpio/rtc_io.c index 4916f51e69..d2612d35fc 100644 --- a/components/driver/gpio/rtc_io.c +++ b/components/driver/gpio/rtc_io.c @@ -8,7 +8,6 @@ #include "esp_log.h" #include "esp_err.h" #include "esp_check.h" -#include "esp_private/periph_ctrl.h" #include "esp_private/io_mux.h" #include "freertos/FreeRTOS.h" #include "freertos/semphr.h" @@ -49,7 +48,7 @@ esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num) rtcio_hal_function_select(rtc_io_number_get(gpio_num), RTCIO_FUNC_DIGITAL); #if SOC_LP_IO_CLOCK_IS_INDEPENDENT - io_mux_enable_lp_io_clock(gpio_num, false); + io_mux_force_disable_lp_io_clock(gpio_num); #endif RTCIO_EXIT_CRITICAL(); diff --git a/components/esp_hw_support/CMakeLists.txt b/components/esp_hw_support/CMakeLists.txt index 86f05b0572..653332ad4a 100644 --- a/components/esp_hw_support/CMakeLists.txt +++ b/components/esp_hw_support/CMakeLists.txt @@ -21,6 +21,10 @@ if(NOT BOOTLOADER_BUILD) "sar_periph_ctrl_common.c" "adc_share_hw_ctrl.c") + if(CONFIG_SOC_LP_IO_CLOCK_IS_INDEPENDENT) + list(APPEND srcs "port/${target}/io_mux.c") + endif() + if(NOT CONFIG_IDF_TARGET_ESP32 AND NOT CONFIG_IDF_TARGET_ESP32S2) list(APPEND srcs "sleep_retention.c") endif() diff --git a/components/esp_hw_support/include/esp_private/io_mux.h b/components/esp_hw_support/include/esp_private/io_mux.h new file mode 100644 index 0000000000..80f922d75c --- /dev/null +++ b/components/esp_hw_support/include/esp_private/io_mux.h @@ -0,0 +1,42 @@ +/* + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include +#include "esp_err.h" +#include "soc/clk_tree_defs.h" +#include "soc/soc_caps.h" +#include "soc/io_mux_reg.h" +#include "hal/gpio_types.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if SOC_LP_IO_CLOCK_IS_INDEPENDENT +typedef struct { + uint8_t rtc_io_enabled_cnt[MAX_RTC_GPIO_NUM]; + uint32_t rtc_io_using_mask; +} rtc_io_status_t; + +/** + * Enable/Disable LP_IO peripheral clock. + * @param gpio_num GPIO number + * @param enable true to enable the clock / false to disable the clock + */ +void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable); + +/** + * Force disable one LP_IO to clock dependency + * @param gpio_num GPIO number + */ +void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num); +#endif + +#ifdef __cplusplus +} +#endif diff --git a/components/esp_hw_support/port/esp32s2/io_mux.c b/components/esp_hw_support/port/esp32s2/io_mux.c new file mode 100644 index 0000000000..69e5057e01 --- /dev/null +++ b/components/esp_hw_support/port/esp32s2/io_mux.c @@ -0,0 +1,61 @@ +/* + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "sdkconfig.h" +#include "esp_attr.h" +#include "freertos/FreeRTOS.h" +#include "esp_private/io_mux.h" +#include "hal/rtc_io_ll.h" + +#define RTCIO_RCC_ATOMIC() \ + for (int _rc_cnt = 1; \ + _rc_cnt ? (portENTER_CRITICAL(&rtc_spinlock), 1) : 0; \ + portEXIT_CRITICAL(&rtc_spinlock), _rc_cnt--) + +extern portMUX_TYPE rtc_spinlock; +static portMUX_TYPE s_io_mux_spinlock = portMUX_INITIALIZER_UNLOCKED; + +static rtc_io_status_t s_rtc_io_status = { + .rtc_io_enabled_cnt = { 0 }, + .rtc_io_using_mask = 0 +}; + +void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) +{ + portENTER_CRITICAL(&s_io_mux_spinlock); + if (enable) { + if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { + s_rtc_io_status.rtc_io_using_mask |= (1ULL << gpio_num); + } + s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]++; + } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] > 0)) { + s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]--; + if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + } + } + RTCIO_RCC_ATOMIC() { + if (s_rtc_io_status.rtc_io_using_mask == 0) { + rtcio_ll_enable_io_clock(false); + } else { + rtcio_ll_enable_io_clock(true); + } + } + portEXIT_CRITICAL(&s_io_mux_spinlock); +} + +void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) +{ + portENTER_CRITICAL(&s_io_mux_spinlock); + s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] = 0; + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + if (s_rtc_io_status.rtc_io_using_mask == 0) { + RTCIO_RCC_ATOMIC() { + rtcio_ll_enable_io_clock(false); + } + } + portEXIT_CRITICAL(&s_io_mux_spinlock); +} diff --git a/components/esp_hw_support/port/esp32s3/io_mux.c b/components/esp_hw_support/port/esp32s3/io_mux.c new file mode 100644 index 0000000000..69e5057e01 --- /dev/null +++ b/components/esp_hw_support/port/esp32s3/io_mux.c @@ -0,0 +1,61 @@ +/* + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "sdkconfig.h" +#include "esp_attr.h" +#include "freertos/FreeRTOS.h" +#include "esp_private/io_mux.h" +#include "hal/rtc_io_ll.h" + +#define RTCIO_RCC_ATOMIC() \ + for (int _rc_cnt = 1; \ + _rc_cnt ? (portENTER_CRITICAL(&rtc_spinlock), 1) : 0; \ + portEXIT_CRITICAL(&rtc_spinlock), _rc_cnt--) + +extern portMUX_TYPE rtc_spinlock; +static portMUX_TYPE s_io_mux_spinlock = portMUX_INITIALIZER_UNLOCKED; + +static rtc_io_status_t s_rtc_io_status = { + .rtc_io_enabled_cnt = { 0 }, + .rtc_io_using_mask = 0 +}; + +void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) +{ + portENTER_CRITICAL(&s_io_mux_spinlock); + if (enable) { + if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { + s_rtc_io_status.rtc_io_using_mask |= (1ULL << gpio_num); + } + s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]++; + } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] > 0)) { + s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]--; + if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + } + } + RTCIO_RCC_ATOMIC() { + if (s_rtc_io_status.rtc_io_using_mask == 0) { + rtcio_ll_enable_io_clock(false); + } else { + rtcio_ll_enable_io_clock(true); + } + } + portEXIT_CRITICAL(&s_io_mux_spinlock); +} + +void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) +{ + portENTER_CRITICAL(&s_io_mux_spinlock); + s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] = 0; + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + if (s_rtc_io_status.rtc_io_using_mask == 0) { + RTCIO_RCC_ATOMIC() { + rtcio_ll_enable_io_clock(false); + } + } + portEXIT_CRITICAL(&s_io_mux_spinlock); +} diff --git a/components/esp_hw_support/port/esp32s3/rtc_clk.c b/components/esp_hw_support/port/esp32s3/rtc_clk.c index 1a28e22976..54a7129b58 100644 --- a/components/esp_hw_support/port/esp32s3/rtc_clk.c +++ b/components/esp_hw_support/port/esp32s3/rtc_clk.c @@ -20,6 +20,7 @@ #include "hal/usb_serial_jtag_ll.h" #include "hal/clk_tree_ll.h" #include "hal/regi2c_ctrl_ll.h" +#include "hal/rtc_io_ll.h" #include "esp_private/regi2c_ctrl.h" #include "soc/regi2c_dig_reg.h" #include "soc/sens_reg.h" @@ -55,7 +56,7 @@ void rtc_clk_32k_enable(bool enable) void rtc_clk_32k_enable_external(void) { PIN_INPUT_ENABLE(IO_MUX_GPIO15_REG); - SET_PERI_REG_MASK(SENS_SAR_PERI_CLK_GATE_CONF_REG, SENS_IOMUX_CLK_EN); + rtcio_ll_enable_io_clock(true); SET_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, RTC_CNTL_X32P_HOLD); clk_ll_xtal32k_enable(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL); } diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index 3b0aa0eb47..c4a8867f7d 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -14,7 +14,6 @@ #include "esp_sleep.h" #include "esp_private/esp_sleep_internal.h" #include "esp_private/esp_timer_private.h" -#include "esp_private/rtc_clk.h" #include "esp_private/system_internal.h" #include "esp_private/io_mux.h" #include "esp_log.h" @@ -1155,7 +1154,7 @@ static void ext0_wakeup_prepare(void) { int rtc_gpio_num = s_config.ext0_rtc_gpio_num; #if SOC_LP_IO_CLOCK_IS_INDEPENDENT - io_mux_enable_lp_io_clock(rtc_gpio_num, true); + rtcio_ll_enable_io_clock(true); #endif rtcio_hal_ext0_set_wakeup_pin(rtc_gpio_num, s_config.ext0_trigger_level); rtcio_hal_function_select(rtc_gpio_num, RTCIO_FUNC_RTC); @@ -1195,7 +1194,7 @@ static void ext1_wakeup_prepare(void) continue; } #if SOC_LP_IO_CLOCK_IS_INDEPENDENT - io_mux_enable_lp_io_clock(rtc_pin, true); + rtcio_ll_enable_io_clock(true); #endif #if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED // Route pad to RTC @@ -1266,6 +1265,9 @@ static void gpio_deep_sleep_wakeup_prepare(void) if (((1ULL << gpio_idx) & s_config.gpio_wakeup_mask) == 0) { continue; } +#if SOC_LP_IO_CLOCK_IS_INDEPENDENT + rtcio_ll_enable_io_clock(true); +#endif #if CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS if (s_config.gpio_trigger_mode & BIT(gpio_idx)) { ESP_ERROR_CHECK(gpio_pullup_dis(gpio_idx)); diff --git a/components/hal/esp32s2/include/hal/rtc_io_ll.h b/components/hal/esp32s2/include/hal/rtc_io_ll.h index 40a618a993..8c5f3bbeda 100644 --- a/components/hal/esp32s2/include/hal/rtc_io_ll.h +++ b/components/hal/esp32s2/include/hal/rtc_io_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,6 +13,7 @@ #pragma once #include +#include #include "soc/rtc_io_periph.h" #include "soc/rtc_io_struct.h" #include "soc/sens_struct.h" @@ -26,7 +27,7 @@ extern "C" { #endif typedef enum { - RTCIO_FUNC_RTC = 0x0, /*!< The pin controled by RTC module. */ + RTCIO_FUNC_RTC = 0x0, /*!< The pin controlled by RTC module. */ RTCIO_FUNC_DIGITAL = 0x1, /*!< The pin controlled by DIGITAL module. */ } rtcio_ll_func_t; @@ -41,6 +42,16 @@ typedef enum { RTCIO_OUTPUT_OD = 0x1, /*!< RTCIO output mode is open-drain. */ } rtcio_ll_out_mode_t; +/** + * @brief Enable/Disable LP IOMUX clock. + * + * @param enable true to enable the clock / false to disable the clock + */ +static inline void rtcio_ll_enable_io_clock(bool enable) +{ + SENS.sar_io_mux_conf.iomux_clk_gate_en = enable; +} + /** * @brief Select the rtcio function. * @@ -51,14 +62,12 @@ typedef enum { static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func) { if (func == RTCIO_FUNC_RTC) { - SENS.sar_io_mux_conf.iomux_clk_gate_en = 1; // 0: GPIO connected to digital GPIO module. 1: GPIO connected to analog RTC module. SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux)); //0:RTC FUNCTION 1,2,3:Reserved SET_PERI_REG_BITS(rtc_io_desc[rtcio_num].reg, RTC_IO_TOUCH_PAD1_FUN_SEL_V, RTCIO_LL_PIN_FUNC, rtc_io_desc[rtcio_num].func); } else if (func == RTCIO_FUNC_DIGITAL) { CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux)); - SENS.sar_io_mux_conf.iomux_clk_gate_en = 0; } } @@ -271,8 +280,7 @@ static inline void rtcio_ll_force_unhold_all(void) */ static inline void rtcio_ll_wakeup_enable(int rtcio_num, rtcio_ll_wake_type_t type) { - SENS.sar_io_mux_conf.iomux_clk_gate_en = 1; - RTCIO.pin[rtcio_num].wakeup_enable = 0x1; + RTCIO.pin[rtcio_num].wakeup_enable = 1; RTCIO.pin[rtcio_num].int_type = type; } @@ -283,7 +291,6 @@ static inline void rtcio_ll_wakeup_enable(int rtcio_num, rtcio_ll_wake_type_t ty */ static inline void rtcio_ll_wakeup_disable(int rtcio_num) { - SENS.sar_io_mux_conf.iomux_clk_gate_en = 0; RTCIO.pin[rtcio_num].wakeup_enable = 0; RTCIO.pin[rtcio_num].int_type = RTCIO_WAKEUP_DISABLE; } diff --git a/components/hal/esp32s3/include/hal/rtc_io_ll.h b/components/hal/esp32s3/include/hal/rtc_io_ll.h index 123a82e679..269abc7710 100644 --- a/components/hal/esp32s3/include/hal/rtc_io_ll.h +++ b/components/hal/esp32s3/include/hal/rtc_io_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,6 +13,7 @@ #pragma once #include +#include #include "soc/rtc_io_periph.h" #include "soc/rtc_io_struct.h" #include "hal/rtc_io_types.h" @@ -43,6 +44,16 @@ typedef enum { RTCIO_OUTPUT_OD = 0x1, /*!< RTCIO output mode is open-drain. */ } rtcio_ll_out_mode_t; +/** + * @brief Enable/Disable LP IOMUX clock. + * + * @param enable true to enable the clock / false to disable the clock + */ +static inline void rtcio_ll_enable_io_clock(bool enable) +{ + SENS.sar_peri_clk_gate_conf.iomux_clk_en = enable; +} + /** * @brief Select the rtcio function. * @@ -57,14 +68,12 @@ static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func) if (rtcio_num == rtc_io_num_map[USB_DM_GPIO_NUM] || rtcio_num == rtc_io_num_map[USB_DP_GPIO_NUM]) { USB_SERIAL_JTAG.conf0.usb_pad_enable = 0; } - SENS.sar_peri_clk_gate_conf.iomux_clk_en = 1; // 0: GPIO connected to digital GPIO module. 1: GPIO connected to analog RTC module. SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux)); //0:RTC FUNCTION 1,2,3:Reserved SET_PERI_REG_BITS(rtc_io_desc[rtcio_num].reg, RTC_IO_TOUCH_PAD1_FUN_SEL_V, RTCIO_LL_PIN_FUNC, rtc_io_desc[rtcio_num].func); } else if (func == RTCIO_FUNC_DIGITAL) { CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux)); - SENS.sar_peri_clk_gate_conf.iomux_clk_en = 0; // USB Serial JTAG pad re-enable won't be done here (it requires both DM and DP pins not in rtc function) // Instead, USB_SERIAL_JTAG_USB_PAD_ENABLE needs to be guaranteed to be set in usb_serial_jtag driver } @@ -297,8 +306,7 @@ static inline void rtcio_ll_force_unhold_all(void) */ static inline void rtcio_ll_wakeup_enable(int rtcio_num, rtcio_ll_wake_type_t type) { - SENS.sar_peri_clk_gate_conf.iomux_clk_en = 1; - RTCIO.pin[rtcio_num].wakeup_enable = 0x1; + RTCIO.pin[rtcio_num].wakeup_enable = 1; RTCIO.pin[rtcio_num].int_type = type; } diff --git a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in index b2b19d676e..f315c2de88 100644 --- a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in @@ -539,6 +539,10 @@ config SOC_RTCIO_WAKE_SUPPORTED bool default y +config SOC_LP_IO_CLOCK_IS_INDEPENDENT + bool + default y + config SOC_SDM_GROUPS int default 1 diff --git a/components/soc/esp32s2/include/soc/soc_caps.h b/components/soc/esp32s2/include/soc/soc_caps.h index 73217368bc..9f0ac420d3 100644 --- a/components/soc/esp32s2/include/soc/soc_caps.h +++ b/components/soc/esp32s2/include/soc/soc_caps.h @@ -241,6 +241,8 @@ #define SOC_RTCIO_INPUT_OUTPUT_SUPPORTED 1 #define SOC_RTCIO_HOLD_SUPPORTED 1 #define SOC_RTCIO_WAKE_SUPPORTED 1 +// LP IO peripherals have independent clock gating to manage +#define SOC_LP_IO_CLOCK_IS_INDEPENDENT 1 /*-------------------------- Sigma Delta Modulator CAPS -----------------*/ diff --git a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in index a5782c0127..cd8de5de38 100644 --- a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in @@ -627,6 +627,10 @@ config SOC_RTCIO_WAKE_SUPPORTED bool default y +config SOC_LP_IO_CLOCK_IS_INDEPENDENT + bool + default y + config SOC_SDM_GROUPS bool default y diff --git a/components/soc/esp32s3/include/soc/soc_caps.h b/components/soc/esp32s3/include/soc/soc_caps.h index a491ba8b51..cc70825eae 100644 --- a/components/soc/esp32s3/include/soc/soc_caps.h +++ b/components/soc/esp32s3/include/soc/soc_caps.h @@ -257,6 +257,8 @@ #define SOC_RTCIO_INPUT_OUTPUT_SUPPORTED 1 #define SOC_RTCIO_HOLD_SUPPORTED 1 #define SOC_RTCIO_WAKE_SUPPORTED 1 +// LP IO peripherals have independent clock gating to manage +#define SOC_LP_IO_CLOCK_IS_INDEPENDENT 1 /*-------------------------- Sigma Delta Modulator CAPS -----------------*/ #define SOC_SDM_GROUPS 1