This commit fixes the issue when trying to allocate memory
with the MALLOC_CAP_EXEC in RTC memory. Prior to the fix,
the heap allocator was returning an address in RTC DRAM.
To fix this issue:
- modified memory_layout.c of the concerned targets to fill the iram_address
field in the rtc entry of the soc_memory_region array properly.
- modified heap component related functions to return IRAM address when
an allocation in RTC memory with MALLOC_CAP_EXEC is requested.
Closes https://github.com/espressif/esp-idf/issues/14835
In esp32c2 and esp32c61 memory_layout.c files, the config used to allow
MALLOC_CAP_EXEC was CONFIG_ESP_SYSTEM_MEMPROT_FEATURE when
CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT should be used.
Closes https://github.com/espressif/esp-idf/issues/14836
Create a specific group "psram" to only run meaningful
tests on the sdkconfig.ci.psram and sdkconfig.ci.psram_all_ext
configuration.
Add test testing that external memory is prioritized when using
MALLOC_CAP_DEFAULT.
The new TLSF architecture has changed. tlsf.h public API
header is now moved into an include folder. tlsf_common.h
is removed from the repo.
This commit updates the heap component and respective
esp_rom patches to take into account this new
architecture.
The implicit promise of heap_alloc_caps() and friends is that the memory it
returns is fit for the purpose as requested in the caps field. Before
this commit, that did not happen; e.g. DMA-capable memory wass returned
from a correct region, but not aligned/sized to something the DMA subsystem
can handle.
This commit adds an API to the esp_mm component that is then used by the
heap component to adjust allocation alignment, caps and size dependent on
the hardware requirement of the requested allocation caps.
This commit adds a feature to pause the heap tracing in the
sense that in this state, the heap tracing will no longer
record the new allocations but will continue to monitor
the free() in order to keep track of the status of the
allocations present in the list of records.
See https://github.com/espressif/esp-idf/issues/13803
don't check for heaps_array != NULL in the loop.
The check is done after the loop since it is allowed
for the allocation to fail until finding aa ssuitable
heap.
Add a test to make sure that the task handles returned in the
task tracking information are valid task handles.
To verify that, feed the task name returned by pcTaskGetName()
using the task handle under test to xTaskGetHandle() and make
sure the task handle returned matches the one under test.
Propagate `n * size` as the size of the failed allocation
instead of just `size` when heap_caps_calloc() fails since
`n * size` is the actual number of bytes that the heap
component tried to allocate.
This return value is used by the tlsf_walk_pool
function to be notified of the need to interrupt
the ongoing traversal of the currently traversed
heap.
Introduce new APIs in essp_heap_caps.h:
- heap_caps_walk()
- heap_caps_walk_all()
Those functions are triggering a callback for all blocks
(allocated or free) of memory present in heaps meeting
the set of capabilities passed as parameter (or all heaps
for heap_caps_walk_all() function)
test_walker.c added to test the new functionality in
test_apps/heap_test/
There is no separate permission control peripheral in C6/H2/P4.
Memory protection is achieved using built-in PMA/PMP and hence
removing permission control specific files.
This commit introduce SOC_MEM_NON_CONTIGUOUS_SRAM flag (that enebled for
esp32p4). If SOC_MEM_NON_CONTIGUOUS_SRAM is enabled:
- LDFLAGS+=--enable-non-contiguous-regions
- ldgen.py replaces "arrays[*]" from sections.ld.in with objects under
SURROUND keyword. (e.g. from linker.lf: data -> dram0_data SURROUND(foo))
- "mapping[*]" - refers to all other data
If SOC_MEM_NON_CONTIGUOUS_SRAM, sections.ld.in file should contain at
least one block of code like this (otherwise it does not make sense):
.dram0.bss (NOLOAD) :
{
arrays[dram0_bss]
mapping[dram0_bss]
} > sram_low
.dram1.bss (NOLOAD) :
{
/* do not place here arrays[dram0_bss] because it may be splited
* between segments */
mapping[dram0_bss]
} > sram_high
