This commit fixes the issue when trying to allocate memory
with the MALLOC_CAP_EXEC in RTC memory. Prior to the fix,
the heap allocator was returning an address in RTC DRAM.
To fix this issue:
- modified memory_layout.c of the concerned targets to fill the iram_address
field in the rtc entry of the soc_memory_region array properly.
- modified heap component related functions to return IRAM address when
an allocation in RTC memory with MALLOC_CAP_EXEC is requested.
Closes https://github.com/espressif/esp-idf/issues/14835
For the SoCs that support configurable MMU page size, it is possible
that the bootloader and application are built with different MMU page
size configuration. This mismatch is not supported at the moment and
application verification fails (at bootup or during OTA update).
Configuring MMU page size helps to optimize the flash space by having
smaller alignment and padding (secure) requirements. Please note that
the MMU page size is tied with the flash size configuration at the
moment (`ESPTOOLPY_FLASHSIZE_XMB`).
This MR ensures that application verification happens using the MMU page
size configured in its binary header. Thus, bootloader and application
can now have different MMU page sizes and different combinations shall
be supported.
Added explicit wait for key manager state to be idle before configuring
the register for flash encryption key usage from efuse. This now ensures
that flash contents are encrypted using efuse programmed key.
Also refactored code a bit to move into target specific directory.
psram: xip_psram support on c5/c61, also fixed cache writeback/invalidate not work issue on c61
Closes IDF-8688, IDF-9292, and IDF-11008
See merge request espressif/esp-idf!33265
The flash encryption on esp32p4 was broken due to some code related
to key manager not being executed when key manager support was
disabled on esp32p4 target.
This commit fixes that behaviour
Additionally, the atomic env enablement for
key_mgr_ll_enable_peripheral_clock was fixed.
feat(newlib): add option to disable eval of expression in assert() when NDEBUG set
Closes IDFGH-479 and IDFGH-8692
See merge request espressif/esp-idf!32887
This configuration bit is required for ADC operation as well and hence
should not be cleared in the RNG API sequence.
Ideally, the ADC driver should take care of initializing this bit but
still the RNG layer change is required because of interleaved API usage
scenario described in following linked issue.
Closes https://github.com/espressif/esp-idf/issues/14124
Closes https://github.com/espressif/esp-idf/issues/14280
