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4 Commits

Author SHA1 Message Date
Song Ruo Jing
7466ddfa8c ci: Make consistence between pytest_*.py and .build-test-rules.yml for esp32c6 (i.e. to pass check_test_scripts_build_test_rules.py) 2022-11-28 11:58:30 +08:00
jiangguangming
08fd77a09a move {target}/rom/miniz.h to a common miniz.h 
- Move {target}/rom/miniz.h to common miniz.h
- Add ESP_ROM_HAS_MZ_CRC32 for ESP32/S2/S3/C3/H4
- Alias mz_crc32 to crc32_le if chips not support ESP_ROM_HAS_MZ_CRC32

Closes https://github.com/espressif/esp-idf/issues/10177
 2022-11-15 15:39:39 +08:00
Song Ruo Jing
be0fdfa176 soc: Add a soc cap, SOC_CLK_RC_FAST_D256_SUPPORTED, for whether the target has the RC_FAST_D256 clock 2022-11-01 11:23:26 +08:00
morris
65767769a9 esp_rom: migrate ut to pytest 2022-09-21 10:42:13 +08:00