This commit:
- Updates the FreeRTOS kernel prvCreateIdleTasks() function to
limit the length of the IDLE task name before copying it to avoid memory
out-of-bounds warnings.
- Fixes a bug where in the IDLE task name string could be a non
null-terminated string in SMP configuration.
This commit fixes a race condition in dual-core SMP mode where in the
xStreamBufferSend() makes the xTaskWaitingToSend NULL but it may
have already been evaluated to not be NULL by xStreamBufferReceive()
running on another core and eventually leading to a crash in tasks.c.
This commit fixes a race condition in dual-core SMP mode where in the
xStreamBufferReceive() makes the xTaskWaitingToReceive NULL but it may
have already been evaluated to not be NULL by xStreamBufferSend()
running on another core and eventually leading to a crash in tasks.c.
This commit fixes a priority inversion when a lower priority task set
event group bits to unblock a higher priority task but the lower
priority task continued to run.
Due to old windows from the startup flow being present after
switching to running freertos tasks windowoverflow exceptions
could potentially try to save windows to the startup stack.
During this overflow they also values previously saved on the
startup stack to find earlier frames' stacks.
Since the start up stack was already recycled these values were
invalid and would cause a crash.
Closes https://github.com/espressif/esp-idf/issues/14406Y
The vTaskPlaceOnEventListRestricted() did not use the correct macro when
exiting a kernel cirtical section. This does not affect the HW targets
but on the Linux port, this caused an issue as the critical nesting
count became negative, leading to deadlocks. This commit fixes the bug
and updates the linux port to prevent the nesting count from going
negative.
This commit fixes an issue where in the FreeRTOS port layer would cause
the portASSERT_IF_IN_ISR() assert check to fail even when the system is
not in an interrupt context.
FreeRTOS tasks may now freely use the PIE coprocessor and HWLP feature.
Just like the FPU, usiing these coprocessors result in the task being pinned
to the core it is currently running on.
vTaskSuspendAll() requires critical sections when building for SMP. Otherwise,
it is possible for a task to switch cores in between getting the core ID and
before incremented uxSchedulerSuspended.
xCoreID was previously printed as the last parameter priority to IDF v5.1, but
was changed to the third paramtere from v5.2 onwards. This commit restores the
correct ordering.
Closes https://github.com/espressif/esp-idf/issues/13675
This commit fixes a bug where the portTRY_ENTER_CRITICAL_SAFE() for the
Xtensa and RISC-V FreeRTOS ports were broken as it did not correctly use
the timeout parameter.
Merges: https://github.com/espressif/esp-idf/pull/13022
- move .tbss to NOLOAD section
- remove xtensa-specific entities from riscv scripts
- explicit eh_frame terminator instead of "align magic"
- 80 characters line length limit
- refactor comments
- discard .rela sections (the rela data will go to relates sections)
fix(riscv): Updated RISC-V functions to set interrupt threshold for CLIC targets
Closes IDFCI-2033, IDFCI-2034, IDF-8090, and IDF-8117
See merge request espressif/esp-idf!29055
This commit introduce SOC_MEM_NON_CONTIGUOUS_SRAM flag (that enebled for
esp32p4). If SOC_MEM_NON_CONTIGUOUS_SRAM is enabled:
- LDFLAGS+=--enable-non-contiguous-regions
- ldgen.py replaces "arrays[*]" from sections.ld.in with objects under
SURROUND keyword. (e.g. from linker.lf: data -> dram0_data SURROUND(foo))
- "mapping[*]" - refers to all other data
If SOC_MEM_NON_CONTIGUOUS_SRAM, sections.ld.in file should contain at
least one block of code like this (otherwise it does not make sense):
.dram0.bss (NOLOAD) :
{
arrays[dram0_bss]
mapping[dram0_bss]
} > sram_low
.dram1.bss (NOLOAD) :
{
/* do not place here arrays[dram0_bss] because it may be splited
* between segments */
mapping[dram0_bss]
} > sram_high
This commit added the RISC-V utility functions to set the interrupt
threshold for CLIC targets by using direct register value writes.
This makes the functions more efficient during run-time.
This is done to improve the critical section enter and exit performance on esp32p4.
