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2172 Commits

Author SHA1 Message Date
Jiang Jiang Jian
58001363d6 Merge branch 'fix/c61_h2_pmu_icg_csv_update_v5.2' into 'release/v5.2' 
fix(pmu): h2 update pmu_icg_mapping.h (v5.2)

See merge request espressif/esp-idf!34798
 2025-01-09 11:50:27 +08:00
Michael (XIAO Xufeng)
b3b14bdf43 Merge branch 'bugfix/warn_rc32k_use_in_kconfig_v5.2' into 'release/v5.2' 
fix(clk): add an inevitable kconfig option to be selected to use rc32k (v5.2)

See merge request espressif/esp-idf!35966
 2025-01-07 15:49:51 +08:00
wanckl
c5a5c98660 fix(pmu): c61 and h2 update pmu_icg_mapping.h 2025-01-06 21:08:41 +08:00
morris
866a02f258 Merge branch 'fix/ble_i2c_v5.2' into 'release/v5.2' 
fix(i2c): Fix i2c read from fifo issue when enabling bt/wifi/uart, etc...  (backport v5.2)

See merge request espressif/esp-idf!36053
 2025-01-02 15:05:32 +08:00
C.S.M
64513a24c4 fix(i2c_slave): Support 10-bit address on esp32 2024-12-30 13:34:37 +08:00
C.S.M
5559c32a8e fix(bod): Improve esp32h2 brownout handling 2024-12-30 12:17:10 +08:00
Song Ruo Jing
47c9382cc2 fix(clk): add an inevitable kconfig option to be selected to use rc32k 2024-12-25 20:07:26 +08:00
Song Ruo Jing
54ca0cf944 fix(clk): rtc_clk_cpu_freq_set_xtal will always disable CPU's PLL 
Align C6/H2 rtc_clk_cpu_freq_set_xtal behavior to other chips
 2024-12-24 22:29:14 +08:00
Li Shuai
a87c6408ec
fix(esp_hw_support): fix the issue of regdma wait node to immediately return to done 2024-12-03 10:35:43 +08:00
Chen Jichang
d5cbc525e8 fix(parlio): fix spelling error in reg_base.h 2024-11-07 15:00:05 +08:00
laokaiyao
e5393c6e2e feat(bootloader): support to check efuse block revision 
change(bootloader): remove ignore efuse check flag (temp)

change(bootloader): use int for the minimum efuse blk rev (temp)
 2024-08-28 12:12:54 +08:00
Song Ruo Jing
707aebc607 feat(uart): support uart module sleep retention on c6/h2 2024-06-18 15:04:20 +08:00
morris
771ae77c9b Merge branch 'bugfix/forbid_uart_suspend_auto_lightsleep_v5.2' into 'release/v5.2' 
uart: Fixed issue that TX be blocked by auto-lightsleep (v5.2)

See merge request espressif/esp-idf!31108
 2024-06-14 11:51:29 +08:00
wuzhenghui
1090b496a1 fix(esp_hw_support/sleep): stop TG0/TG1 watchdog if XTAL not power down in lightsleep 2024-06-04 21:30:28 +08:00
wuzhenghui
92e3fd4e44 change(esp_hw_support/sleep): improve esp32c3 systimer stall bug workaround 2024-06-04 21:30:28 +08:00
Omar Chebib
742b3a1814 fix(esp_hw_support): clear reserved interrupts that are not applicable for each target 2024-05-30 12:12:44 +08:00
Omar Chebib
35dd4e1557 refactor(esp_hw_support): changed reserved interrupt functions to be now defined per SoC 2024-05-30 11:49:13 +08:00
Xiao Xufeng
7f68fe1cff fix(soc): fixed uart_periph.h not including reg.h issue 
This will cause rom/uart.h can't compile.
 2024-05-28 10:57:59 +08:00
morris
9b3ae86417 Merge branch 'bugfix/fix_gpio_etm_multi_task_v5.2' into 'release/v5.2' 
fix(gpio_etm): allow one GPIO binds to multiple ETM tasks (v5.2)

See merge request espressif/esp-idf!30456
 2024-04-25 16:31:22 +08:00
Song Ruo Jing
1ed2f223fb fix(uart): correct C2 UART_BITRATE_MAX value 2024-04-24 16:19:41 +08:00
Song Ruo Jing
373e585bb7 fix(gpio_etm): allow one GPIO binds to multiple ETM tasks 2024-04-24 16:01:34 +08:00
gaoxu
1df5f07eee docs(uart): update lp uart uart programming guide 2024-04-15 19:39:38 +08:00
Song Ruo Jing
c55a07bf57 refactor(uart): add support to be able to test LP_UART port 
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
 2024-04-15 19:39:30 +08:00
harshal.patil
bd826801ba
fix(mbedtls/ecdsa): Fix dependant peripheral's enable and reset 2024-04-11 13:46:59 +05:30
zlq
27322a8597 fix(rtc_cntl_reg.h): fix RTC_CNTL_SLAVE_PD_M(v5.2) 2024-04-10 19:55:51 +08:00
Cao Sen Miao
2291ded9a1 fix(i2c): Use hardware fsm reset on esp32c6/h2/p4 2024-04-01 10:15:50 +08:00
Nachiket Kukade
413bcd8fcd feat(esp_wifi): Refactor and improve FTM code 
Enable FTM Responder mode for ESP32C6. Update wifi libs with below -

1. Break FTM State Machine code into separate functions
2. Use dynamic allocation for FTM session to save memory
3. Add API to get FTM report instead of event based mechanism
4. Add FTM Request retry and comeback support
 2024-03-26 18:00:10 +05:30
Jiang Jiang Jian
2d818bbfe5 Merge branch 'docs/rf_coexistence_api_guides_support_esp32c2_v5.2' into 'release/v5.2' 
Docs: RF coexistence api guides support esp32c2 (v5.2)

See merge request espressif/esp-idf!29213
 2024-03-11 10:40:40 +08:00
Jiang Jiang Jian
a15fd9846b Merge branch 'fix/bbpll_usb_link_error_backport5.2' into 'release/v5.2' 
fix(esp_phy): Allow WiFi/USB interference workaround option only on supported targets (backport v5.2)

See merge request espressif/esp-idf!29481
 2024-03-11 10:22:26 +08:00
Marius Vikhammer
9e5c30baff Merge branch 'bugfix/reset_reasons_v5.2' into 'release/v5.2' 
Update reset reasons for C6, H2, P4 and C5 (v5.2)

See merge request espressif/esp-idf!29180
 2024-03-08 09:42:36 +08:00
Tomas Rezucha
bbb549c830 fix(esp_phy): Allow WiFi/USB interference workaround option only on supported targets 
"Enable USB when phy init" Kconfig option would call esp_phy function
`phy_bbpll_en_usb()` that is not implemented for all targets.
Selecting this option for unsupported target results in linking error.

The necessity of this workaround is now defined soc_caps.h rather than
in the Kconfig.

Closes https://github.com/espressif/esp-idf/issues/12185
 2024-03-07 12:47:39 +01:00
linruihao
3d5852131b fix(esp_coex): add support_coexistence soc_caps for esp32c2 and esp32h2 2024-02-23 16:15:45 +08:00
Jiang Jiang Jian
8e1cd38970 Merge branch 'c6_auto_dbias_master_hsq_v5.2' into 'release/v5.2' 
ESP32C6: Active & sleep dbg and dbias get from efuse to fix the voltage (v5.2)

See merge request espressif/esp-idf!28729
 2024-02-22 20:04:08 +08:00
hongshuqing
b3a73d5b63 feat(pmu): set fix voltage to different mode for esp32c6 2024-02-22 14:49:01 +08:00
Marius Vikhammer
e930ff0b1f fix(system): update reset reasons for C6 and H2 2024-02-22 12:37:49 +08:00
Cao Sen Miao
4df78f9cff fix(temperature_sensor): Cannot switch the range smmothly on esp32h2 2024-02-21 18:51:29 +08:00
Jiang Jiang Jian
3c7c5829b7 Merge branch 'h2_auto_dbias_master_hsq_v5.2' into 'release/v5.2' 
ESP32H2: Active & sleep dbias get from efuse to fix the voltage (v5.2)

See merge request espressif/esp-idf!28714
 2024-02-21 10:49:16 +08:00
Darian Leung
471fe41828
refactor(soc): Remove soc/usb_types.h 
This header has been removed for the following reasons:

- Header is misplaced. 'xxx_types.h' headers should be placed in the 'hal'
component.
- The 'usb_xxx_endpoint_t' should be placed in the 'xxx_struct.h' header.
 2024-02-19 15:45:04 +08:00
Darian Leung
b07a43e630
refactor(soc): Rename usb_otg_periph to usb_dwc_periph 
- Renamed usb_otg_periph.h/c to usb_dwc_periph.h/c to match naming convention
of other DWC OTG related files
- Added compatibility header for usb_otg_periph.h
 2024-02-19 15:45:04 +08:00
Darian Leung
50b3a35c52
refactor(soc): Deprecate usb pin mappings 
usb_pins.h and usb_periph.h/c lists mappings of USB DWC signals to GPIOs used
to connect to external FSLS PHYs. However, those signals can be routed to any
GPIOs via the GPIO matrix. Thus, these mapping are meaningless and have been
deprecated.
 2024-02-19 15:45:03 +08:00
Darian Leung
f0219b73f9
refactor(hal/usb): Rename usb_fsls_phy API to match header/source names 
Note: Also fixed some formatting issues in usb_wrap_struct.h
 2024-02-19 15:45:02 +08:00
Darian Leung
d08b90c5cc
refactor(soc/host): Update USB OTG struct fields 
This commit updates the "*_struct.h" files for the USB OTG peripheral:

- Added/removed some missing/non-existing register fields
- Added "reserved" place holders for registers that are missing due to IP
configuration.
- Added "usb_dwc_cfg.h" listing the USB OTG IP configuration for each target.
- Updated LL/HAL according to register field updates. Also tidied up the include
directives in those headers.
 2024-02-19 15:45:00 +08:00
morris
81dc597d1f Merge branch 'bugfix/fix_incorrect_regbase_name_of_i2s_v5.2' into 'release/v5.2' 
fix(i2s): fixed incorrect reg base name on C3 (v5.2)

See merge request espressif/esp-idf!28629
 2024-02-18 11:29:42 +08:00
Mahavir Jain
e173895618 fix(soc): change debug addr range to CPU subsystem range 
For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).

For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.

For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
 2024-01-29 13:57:04 +08:00
laokaiyao
66d7410051 fix(i2s): fixed incorrect reg base name on C3 
Closes https://github.com/espressif/esp-idf/issues/12643
 2024-01-26 18:44:38 +08:00
KonstantinKondrashov
64b1bd6cb2 feat(efuse): Adds new efuses for esp32c6 2024-01-26 11:36:57 +08:00
KonstantinKondrashov
bc6072c754 feat(efuse): Adds new efuse for esp32h2 2024-01-26 11:36:56 +08:00
Roshan Bangar
962b105be5 fix(nimble): Added periodic_adv_enh soc_caps for c2, h2 2023-12-26 10:09:12 +05:30
Jiang Jiang Jian
99d10ca3d2 Merge branch 'change/change_regdma_power_issue_macro_v5.2' into 'release/v5.2' 
change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG (backport v5.2)

See merge request espressif/esp-idf!27992
 2023-12-25 20:38:48 +08:00
Jiang Jiang Jian
3139ae0f0e Merge branch 'backport/openthread_related_feature_v52' into 'release/v5.2' 
Backport some openthread related features (backport v5.2)

See merge request espressif/esp-idf!28053
 2023-12-25 20:37:03 +08:00